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Page Title:
Microcircuits, Digital, CMOS, 4096 BIT, Static Random Access Memory (SRAM), Bulk Silicon and Silicon on Sapphire |
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|  INCH-POUND
MIL-M-38510/245B
13 March 2006
SUPERSEDING
MIL-M-38510/245A
28 January 1987
MILITARY SPECIFICATION
MICROCIRCUITS, DIGITAL, CMOS, 4096 BIT, STATIC RANDOM ACCESS MEMORY (SRAM), BULK SILICON AND
SILICON ON SAPPHIRE
Inactive for new design after 24 July 1995
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product herein shall consist of this specification sheet and MIL-PRF 38535
1. SCOPE
1.1 Scope. This specification covers the detail requirements for bulk silicon and silicon on sapphire (SOS), static, 4096
bit, random access memory microcircuits. Two product assurance classes, four radiation hardness assurance levels, and a
choice of case outlines and lead finishes are provided and are reflected in the part number. For this product, the
requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, (see 6.4).
1.2 Part or Identifying Number (PIN). The PIN is in accordance with MIL-PRF-38535, and as specified herein.
1.2.1 Device types. The device types are as follows:
Device type
Circuit
Access times
01 (bulk silicon)
4096x1 bit RAM
120 ns
02 (bulk silicon)
1024x4 bit RAM
120 ns
03 (synchronous; bulk silicon)
4096x1 bit RAM
320 ns
04 (synchronous; bulk silicon)
1024x4 bit RAM
320 ns
05 (asynchronous; SOS)
4096x1 bit RAM
250 ns
06 (asynchronous; SOS)
1024x4 bit RAM
250 ns
1.2.2 Device class. The device class is the product assurance level as defined in MIL-PRF-38535.
1.2.3 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
Terminals
Package style
V
GDIP1-T18 or CDIP2-T18
18
Dual-in-line
K
GDFP2-F24 or CDFP3-F24
24
Flat pack
1.2.4 Radiation hardness level. Radiation hardness levels shall be as defined in MIL-PRF-38535.
Comments, suggestions, or questions on this document should be addressed to: Commander, Defense
Supply Center Columbus, ATTN: DSCC-VAS, P. O. Box 3990, Columbus, OH 43218-3990, or emailed to
memory@dscc.dla.mil. Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at http://assist.daps.dla.mil
AMSC N/A
FSC 5962
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