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Figure 4. Clear and preset switching test circuit and waveforms for device type 01.
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Microcircuits, Digital, TTL, Flip-Flops, Monolithic Silicon
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Figure 6. Clear switching test circuit and waveforms for device types 02 and 03.



img
MIL-M-38510/2G
NOTES:
1.  Clock input characteristics for tPLH, tPHL (clock to output), Vgen = 3 V, t1 = t0 10 ns, tp (clock)
= 25 ns, and PRR = 1 MHz. All J and K inputs are at 2.4 V. When testing fMAX the clock
input characteristics are Vgen = 3 V, t1 = t0 10 ns, tp (clock) = 20 ns, and PRR = see table
III.
2.  J = J1 J2 J3; and K = K1 K2 K3
3.  All diodes are 1N3064, or equivalent.
4.  CL = 50 pF minimum (CL includes probe and jig capacitance).
5.  RL = 3905%
FIGURE 5. Synchronous switching test circuit for device type 01.
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