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TABLE III. Group A inspection for device type 04 - Continued
Terminal conditions (pins not designated may be high 2.0 V or low 0.7 V or open).
MIL-STD-
Cases E,F
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Measured Test Limits
Unit
terminal
Subgroup Symbol
883
Cases 2, X
2
3
4
5
7
8
9
10
12
13
14
15
17
18
19
20
method
Test no.
CLK
AIN
BIN
CIN
VCC
DIN
EIN
Enable
Serial
QE
QD
GND
QC
QB
QA
CLR
Min
Max
10
fmax
(Fig. 7)
107
17
---
MHz
Tc = 25C See E
3003
108 to 112 Same tests and terminal conditions as for subgroup 9.
5
68
ns
tPLH1
(Fig, 7)
113 to 122
"
60
"
tPLH2
123 to 127
"
68
"
tPHL1
128 to 132
90
"
tPHL2
"
Same tests, terminal conditions, and limits as subgroup 10, except TC = -55C.
11
Notes:
A. VIN = 2.5 V.
B. VIN = 0.4 V.
C. Tests numbers 53 through 80 shall be run in sequence.
D. Output voltages shall be either: (1) H 2.5 V minimum and L 0.4 V maximum when using a high speed checker double
double comparator; (2) H 1.5 V and L 1.5 V when using a high speed checker single comparator.
E. fMAX minimum limit specified is the frequency of the clock input pulse. The output frequency shall be one-half of the input
clock frequency. The input frequency on the serial data shall be one-half of the clock input frequency and the serial shall be
and  are coincident with the clock . Rise and fall times 6 ns. Input peak voltage 3 to 5 volts.
shifted such that the serial
1/ IIL limits (mA) min/max values for circuits shown:
Parameter
Terminal
A
B
IIL3
CLK
-.16/-.40
-.16/-.40
AIN, BIN, CIN
-.16/-.40
-.12/-.36
DIN, EIN, CLR
Serial
-.10/-.34
-.10/-.34
IIL5
Enable
-.8/-2.0
-.6/-1.8
F. 3.0 V minimum/5.0 V maximum.

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