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MIL-M-38510/311C
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions
Limits
Unit
-55C TC +125C
Min
Max
CL = 50 pF 10%, 3 gate levels 4/, 5/
2
42
ns
Propagation delay from any
tPHL1
RL = 2 k
A or B input to A > B or A < B
outputs
CL = 50 pF 10%, 3 gate levels 4/, 5/
2
39
ns
Propagation delay from any
tPHL2
RL = 2 k
A or B input to A = B output
CL = 50 pF 10%, 2 gate levels 4/, 5/
2
28
ns
Propagation delay from
tPHL3
RL = 2 k
A < B or A = B inputs
to A > B output
CL = 50 pF 10%, 1 gate level 4/, 5/
2
36
ns
Propagation delay from
tPHL4
RL = 2 k
A = B input to A = B
output
CL = 50 pF 10%, 2 gate levels 4/, 5/
2
26
ns
Propagation delay from
tPHL5
RL = 2 k
A > B or A = B input to A < B
output
1/ All unspecified inputs grounded.
2/ Not more than one output should be shorted at one time.
3/ ICC is measured with outputs open, A = B grounded, and all other inputs at 4.5 V.
4/ The longest gate level propagation delay paths are not tested (5 gate levels); however, they can be calculated:
t = tP1 maximum + tP2 maximum - tP4 minimum.
5/ Gate level references are made with respect to the logic diagram.
5

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