05 June 2003
22 May 1987
MICROCIRCUITS, DIGITAL, HIGH-SPEED CMOS,
NAND GATES, MONOLITHIC SILICON, POSITIVE LOGIC
Inactive for new design after 9 August 1996.
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
1.1 Scope. This specification covers the detail requirements for monolithic silicon, high speed CMOS, logic
microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are
reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by
MIL-PRF-38535 (see 6.3).
1.2 Part number. The part number shall be in accordance with MIL-PRF-38535, and as specified herein.
1.2.1 Device types. The device types shall be as follows:
Quad 2 - input NAND gate
Triple 3 - input NAND gate
Dual 4 - input NAND gate
8 - input NAND gate
Quad 2 - input NAND Schmitt trigger
1.2.2 Device class. The device class shall be the product assurance level as defined in MIL-PRF-38535.
1.2.3 Case outlines. The case outlines shall be as designated in MIL-STD-1835 and as follows:
GDIP1-T14 or CDIP2-T14
GDFP1-F14 or CDFP2-F14
Square leadless chip carrier
Comments, suggestions, or questions on this document should be addressed to: Commander, Defense
Supply Center Columbus, ATTN: DSCC-VAS, 3990 East Broad St., Columbus, OH 43216-5000, or email
CMOS@dscc.dla.mil. Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at www.dodssp.daps.mil.
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.