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|  MIL-N-81604C(AS)
Para 3.4.4.lb
(cont)
This signal shall be a minimum of 20 milli-
seconds in duration. The line driver in the
ANCU and the line receiver in the IMU shall be
Type C circuits.
IMU Flag Reset - The true (low, open, or ANCU
(4)
power off) state of this discrete shall be
supplied from the ANCU to the IMU to reset the
IMU malfunction flag to the go state (black).
Also, this discrete shall prevent the IMU Flag
Set signal from setting the IMU flag. This
signal shall be a minimum of 20 milliseconds in
duration. The line driver in the ANCU and the
line receiver in the IMU shall be Type C
circuits.
IMU Clock - This 9.6-KHz clock output from the IMU
c.
It shall be
to the ANCU shall serve two functions.
used by the ANCU for gating the incremental velocity
pulses into the velocity input registers.In addi-
tion, it shall be used in the ANCU to develop the
synchronous gyro torquing pulses. This clock is
therefore, synchronous with both the incremental
velocity pulses and the gyro torquing pulse. See
figure 6 for timing diagram. The line driver in
the IMU and the line receiver in the ANCU shall be
Type A circuits. The IMU line driver shall also be
capable of operation with the Type AA receiver
defined in table VI.
Velocity Pulses - The IMU shall provide increments
d.
of inertially derived velocity to the ANCU. See
figure 7 for definition of the coordinate system.
See figure 6 for interface timing.
+Delta vx- The output from the IMU to the ANCU
shall be an incremental pulse train with each
pulse representing an increment of inertially
derived velocity. When the Navigate discrete
is true, each pulse shall represent 0.032
feet/second. When the Navigate discrete is
false, each pulse shall represent 0.004 feet/
In either mode, the pulses shall be
second.
developed in sync with the IMU 9.6-KHz clock
39
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