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|  MIL-N-81604C(AS)
Appendix I
Para 30.5.8.4
(cont)
DOPLR Message - This message from the DOPLR shall
c.
contain ground speed and drift angle information.
Refer to 30.5.8.4. The CAU line receiver shall *
be a Type 2 circuit.
DOPLR Clock - The CAU shall provide a 1.2-MHz
d.
clock to the DOPLR for clocking the DOPLR mes-
sage. This clock shall always be available
when aircraft power is on, regardless of a CAU
power supply failure or an off condition. The
accuracy shall be 0.1 percent and the pulse
width shall be 100 25 nanoseconds. The CAU
line driver shall be a Type 2 circuit.
30.5.8.5 CAU/ADC Serial Interface - The CAU shall initiate a
message request to the ADC as a result of having received the
*
proper six-bit request code from the ANCU (EOP mode) via Data
2 (table XXIII). The ADC shall then respond with 32-bit mesage
*
gate and message. The message request from the CAU shall re-
turn to its false state within 10 S of the leading edge of the
message gate. The CAU shall provide a 1.2-MHz clock for clocking
data into the CAU. The leading edge of a data bit from the ADC
with respect to the leading edge of the CAU clock shall be
within 200 ns. The data from the ADC shall be transmitted, MSB
*
first, in the format shown in figure 38. The 32-bit message
shall go through a 3-bit delay in being shifted into the first
27-bit positions of the CAU serial data register. The ADC data
shall then be shifted out, MSB first, of the serial data register
*
to the ANCU via Data 1 for interleave into memory. Refer to
30.5.10.10
.
ADC Message Request - This message request from
a.
the CAU shall be answered by the ADC with a
message gate and a message. Refer to 30.5.8.5.
*
The CAU line driver shall be a Type 1 circuit.
ADC Meseage Gate - This message gate from the
b.
ADC shall bracket all bits in the Am message.
Refer to 30.5.8.5. The CAU line receiver shall *
be a Type 2 circuit.
ADC Message - This message rom the ADC shall
c.
contain barometric altitude and true air speed
Refer to 30.5.8.5. The CAU line
information.
receiver shall be a Type 2 circuit.
175
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