 |
|||
|
Page Title:
Common connector contact continuity |
|
||
| ||||||||||
|
|  MIL-C-70490(AR)
TABLE I.
Memory circuit card assembly
connector contacts.-Contlnued
A47
VPPL4
P1
B47
Spare
A48
P1
VPPH4
B48
Spare
A49
P1
Spare
B49
Spare
A50
P1
B50
GND
3.2
Performance.
3.2.1 General. The performance of the memorv circuit card
assembly shall be in accordance with the following requirements.
3.2.1.1 Memory read cycle. A memory read cycle from either
RAM or EPROM shall be accomplished by applying the signals
specified in Figure 3 and Table I.
3.2.1.2 RAM write cycle. A RAM write cycle shall be
accomplished by applying the signals specified in Figure 4 and
Table I.
3.2.1.3 EPROM proqram cycle. An EPROM program cycle shall be
accomplished by applying the signals specified in Figure 5 and
Table I.
3.2.1.4 EPROM erasure. The EPROM shall be considered to be
erased when hexadecimal memory locatiOns (4000) to (7FFF) in all
four lower banks and (8000) to (BFFF) in all four lower banks
contain data (FF).
The voltage at P1-B23
3.2.1.5 RAM standby circuitry
(RAM+5V) shall switch to .1 plus or minus .1 volts DC with respect
to P1-Bl (GND) when the voltage at P1-B22 (BAT+5V) decreases to
3.5 plus or minus .5 volts DC with respect to GND.
3.2.1.6 Common connector contact continuity. The resistance
between the following respective connector contacts shall be less
than 7.5 ohms:
P1-A1
P1-A18
to
P1-B18
to
P1-B1
P1-B1
P1-B33
to
P1-B50
to
P1-B1
3.2.1.7 Pullup resistor. The resistance between P1-A38 and
P1-A1 shall be 10 kilohms plus or minus 500 ohms.
3.2.2 Physical characteristics. The physical characteristics
shall be as prescribed by the drawings, specifications, and QAP's.
6
|
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |
Click
here for thousands of PDF manuals