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Page Title:
Data Transfer - Computer to Peripheral Equipment and the DMS |
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|  MIL-D-81347C(AS)
3.5.4.4.1.3.2
Data Transfer - Computer to Peripheral Equipment and the DMS -
An output peripheral equipment which communicates with the computer via the DMS shall be able to
receive up to a 30-bit data word from the computer by the Output Data Request (ODR) /output Acknow -
ledge (OA) data transfer mode or up to a 29-bit data word from the computer by the External Function
Request (EFR) External Function (EF) data transfer mode. Output Bit 29 (OB29) of the EF word will
not be available to the output peripherals. It shall, in the DMS, determine a peripheral EF word; a
logic zero being a peripheral word. There will be two types of EF words which shall be used within
the DMS and not transferred to the peripherals, Master Clear E F and DMS Instruction E F.
(1) Peripheral OA - Data transfer using OA shall be under
computer control. By outputting a DMS Instruction E F, the computer shall be able to select one and
only one DMS output channel to receive up to a 30-bit output data word via OA. When an output peri-
pheral raises an ODR TO THE SELECTED DMS channel, indicating it is in a condition to accept data, the
DMS shall perform the following sequence of events:
(a) Route the ODR directly to the computer.
(b) The computer 1/0 subunit detects the ODR.
(c) The computer at its convenience places up to 30 data
bits on the computer output data lines. The 30 data bits are routed directly to all DMS channels.
Except for interface circuits, the DMS shall perform no logic affecting this data.
(d) The computer sets the Output Acknowledge line indi-
the data is ready to be sampled.
(e) The DMS routes the Output Acknowledge signal to the
selected DMS channel.
(2) Peripheral EF - Data transfer using E F shall be the same
as OA except only 29 bits will be available to the peripherals.
(3) (3) DMS E F - The computer will transmit this word to the DMS
with force; on receipt of all EF words the D M S perform the following sequence:
(a) Determine the status of Output Bit 29.
(b) If Bit 29 equals a Logic O then the EF shall be routed
as a Peripheral E F described previously.
(c) If Bit 29 equals a Logic 1 the DMS shall drop computer
channel 13 EFR to a logic "0" for the duration of the EF Pulse and then perform either a Master Clear
or a DMS Instruction,
3.5.4.4.1.3.3
Timing and Initialization
(1) The time required for the DMS to process one computer
generated instruction shall not exceed 10 sec.
(2) The time between a peripheral raising an External Interrupt
or an Input Data Request to the DMS and the transmission of that signal to the computer shall not ex-
ceed 6 sec assuming no other input operation is in progress when the DMS receives the signal. If an
input operation is in progress, then the time from trailing edge of that input acknowledge to setting of
the EI or IDR to the computer shall not exceed 6 sec.
(3) The time between a peripheral raising an External Function
Request or an Output Data Request to the selected DMS channels and the transmission of that request
to the computer shall not exceed 1 sec.
.
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