Modules, Standard Electronic, Shift Register, Serial and Parallel, Digital, Key Code PDL

Click here to make tpub.com your Home Page

Page Title: Modules, Standard Electronic, Shift Register, Serial and Parallel, Digital, Key Code PDL

Click here for thousands of PDF manuals

Web
www.tpub.com

Information Categories

....

Administration
Advancement
Aerographer
Automotive
Aviation
Construction
Diving
Draftsman
Engineering
Electronics
Food and Cooking
Logistics
Math
Medical
Music
Nuclear Fundamentals
Photography
Religion

Modules, Standard Electronic, Shift Register, Serial and Parallel, Digital, Key Code PDL

Modules, Standard Electronic, Shift Register, Serial and Parallel, Digital, Key Code PDL
Failure Rate Requirements
Figure 1. PDL module function diagram, serial and parallel shift register
Table I. Module electrical requirements
Table I. Module electrical requirements (cont)
Table I. Module electrical requirements (cont)
Alternate Test Methods
Module Description
Table II. Input to output relationship
Figure 2. Operating temperature and life test circuit
Figure 3. Component temperature test circuit
Figure 4. Vibration test circuit
Table III. VOUT (low-loaded) test
Figure 5. VOUT (low-loaded) test circuit for table III
Figure 6. Isolation test circuit for table IV
Table V. Input breakdown current test
Figure 7. Input breakdown current test circuit for table V
Table VI. Input clamp diode voltage test
Figure 8. Input clamp diode voltage test circuit for table VI
Table VII. Input current (high-level) test
Table VIII. Input current (low-level) test
Table IX. Output short circuit current test
Figure 9. Input current (high-level and low-level) and output short circuit current test circuit for tables VII, VIII, and IX
Table X. Functional shift right (low-level and high-level) test
Table XI. Output voltage (low-level) test
Table XII. Output voltage (high-level) test
Table XII. Output voltage (high-level) test (cont)
Figure 10. Functional shift right and output voltage test circuit for tables X, XI, and XII
Figure 10. Functional shift right and output voltage test circuit for tables X, XI, and XII (cont)
Figure 10. Functional shift right and output voltage test circuit for tables X, XI, and XII (cont)
Figure 11. PDL logic load circuit
Table XIII. Power supply current test
Figure 12. Power supply current test circuit for table XIII
Figure 13. Power supply transient rise time test circuit for table XIV
Figure 14. Power supply transient rise time test circuit waveforms for table XIV
Table XV. Transition time (tTLH) test
Table XVI. Transition time (tTHL) test
Table XVII. Propagation delay time (tPHL) and minimum parallel and serial setup time check test
Table XVII. Propagation delay time (tPHL) and minimum parallel and serial setup time check test (Cont)
Table XVIII. Propagation delay time (tPLH) and minimum parallel and serial setup time check test
Table XVIII. Propagation delay time (tPLH) and minimum parallel and serial setup time check test (Cont)
Table XIX. Parallel and serial hold time check test
Table XX. Maximum shift frequency check and minimum clock pulse width check test
Transition time (tTLH and tTHL) and Propagation delay time (tPHL and tPLH) test
Figure 16. Transition time and Propagation delay time test and minimum parallel and serial setup time check test
Figure 17. Parallel and serial setup time check test circuit waveforms for table XIX
Figure 18. Maximum shift frequency check and minimum clock pulse width check test circuit waveforms
Figure 19. Parallel enable minimum setup and hold time check test circuit for table XXI
Figure 20. Parallel enable minimum setup and hold time check test circuit waveforms for table XXI
Figure 21. Parallel enable minimum setup and hold time check test circuit waveforms for table XXI
Table XXII. Output crosstalk (low-level and high-level) test
Table XXII. Output crosstalk (low-level and high-level) test (cont)
Table XXII. Output crosstalk (low-level and high-level) test (cont)
Table XXII. Output crosstalk (low-level and high-level) test (cont)
Figure 22. Output crosstalk (low-level and high-level) test circuit for table XXII
Figure 23. Output crosstalk (low-level and high-level) test circuit waveforms for table XXII
Figure 24. Output crosstalk (low-level) test circuit waveforms for table XXII
Figure 25. Power supply transient amplitude test circuit for table XXIII
Figure 26. Power supply transient amplitude test circuit waveforms for table XXIII
Table XXIV. Input capacitance test
Figure 27. Input capacitance test circuit for table XXIV
Standardization Document Improvement Proposal
Address

Modules, Standard Electronic, Shift Register, Serial and Parallel, Digital, Key Code PDL

Privacy Statement - Press Release - Copyright Information. - Contact Us

Integrated Publishing, Inc. - A (SDVOSB) Service Disabled Veteran Owned Small Business