Modules, Standard Electronic, Amplifier, Summing, Analog, Key Code BED

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Modules, Standard Electronic, Amplifier, Summing, Analog, Key Code BED

Modules, Standard Electronic, Amplifier, Summing, Analog, Key Code BED
Correlation Requirements
Circuit Pin Configuration
Alternate Test Methods
Figure 1. BED module function diagram, amplifier, summing
Table I. Module electrical requirements
Table I. Module electrical requirements (cont)
Packaging Requirements
Figure 2. Operating temperature and component temperature test circuit
Figure 3. Vibration test circuit
Figure 4. Life test circuit
Table II. Isolation test
Figure 5. Isolation test circuit for table II
Table III. Output short circuit current test
Figure 6.Output short circuit current test circuit for table III
Table IV. Continuity test
Figure 7. Continuity test circuit for table IV
Table V. DC gain accuracy test
Figure 8. DC gain accuracy test circuit for table V
Table VI. AC gain accuracy and bandwidth test
Figure 9. AC gain accuracy and bandwidth test circuit for table VI
Table VII. Output offset voltage test
Figure 10. Output offset voltage test circuit for table VII
Table VIII. Phase shift and delta phase shift test
Figure 11. Phase shift and delta phase shift test circuit for table VIII
Table IX. Output voltage swing and output distortion test
Figure 12. Output voltage swing and output distortion test circuit for table IX
Table X. Input resistance test
Figure 13. Input resistance test circuit for table X
Table XI. Power supply filter capacitance test
Figure 14. Power supply filter capacitance test circuit for table XI
Table XII. Quiescent power supply current test
Figure 15. Quiescent power supply current test circuit for table XII
Table XIII. Self noise test
Figure 16. Self noise test circuit for table XIII
Table XIV. Power supply ripple rejection test
Figure 17. Power supply ripple rejection test circuit for table XIV
Table XV. Output impedance test
Figure 18. Output impedance test circuit for table XV
Table XVI. Output slew rate test
Figure 19. Output slew rate test circuit for table XVI
Figure 20. Output slew rate test circuit waveform for table XVI
Table XVII. Crosstalk test
Figure 21. Crosstalk test circuit for table XVII
Figure 22. Crosstalk test circuit waveforms for table XVII
Address
Standardization Document Improvement Proposal

Modules, Standard Electronic, Amplifier, Summing, Analog, Key Code BED

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