Modules, Standard Electronic, Programmable Timer, Digital, Key Code HQE

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Modules, Standard Electronic, Programmable Timer, Digital, Key Code HQE

Modules, Standard Electronic, Programmable Timer, Digital, Key Code HQE
Module Description
Module Function
Table I. Input to output relationship
Table II. Timer programming
Standard Programming
Figure 1. Additon of Standard Time
Figure 2. Cascading of times
Applicable Documents
End-of-Life Limits
Test Procedures
Table IV. Module electrical requirements
Table IV. Module electrical requirements (Cont)
Table IV. Module electrical requirements (Cont)
Table IV. Module electrical requirements (Cont)
Table IV. Module electrical requirements (Cont)
Preparing Activity
Figure 3. HQE module function diagram, programmable timer
Figure 3. HQE module function diagram, programmable timer (cont)
Figure 4. Operating temperature and life test circuit
Figure 5. Component temperature test circuit
Figure 6. Vibraton test circuit
Table V. Isolation test
Figure 7. Isolation test circuit for table V
Table VI. 7 V Vcc stress test
Table VI. 7 V Vcc stress test circuit for table VI
Table VII. T output voltage, low level, Vcc = 4 5 V test
Figure 9. T output voltage, low level, Vcc = 4 5 V test circuit for table VII
Table VIII. T, D, Q, and Q output voltage, low-level test
Table VIII. T, D, Q, and Q output voltage, low-level test (cont)
Figure 10. VOUT, T, D, Q, and Q output voltage, low-level test circuit for table VIII
Table IX. Q, Q, and D output voltage, high-level test
Figure 11. Q, Q and D output voltage, high level, testcircuit for table IX
Table X. D output voltage, high-level test
Table X. D output voltage, high-level test (cont)
Figure 12. D output voltage, high-level test circuit for table X
Figure 13. D output voltage, high-level waveforms for table X
Table XI. Collector leakage current test
Figure 14. Collector leakage current test circuit for table XI
Table XII. T collector leakage current test
Figure 15. Collector leakage current test circuit for table XII
Table XIII. Cout (oscillator) voltage, low-and-high level test
Table XIII. Cout voltage, low level and high level test circuit for table XIII
Table XIII. Cout voltage, low level and high level waveform for table XIII
Table XIV. P, CIN, and S/R input current, low-level test
Figure 18. P, CIN, and S/R input current, low-level test circuit for table XIV
Table XV. Z input current, low-level test
Figure 19. Z input current, low-level test circuit for table XV
Table XVI. P, CIN, and S/R input current, high-level test
Figure 20. P, CIN, and S/R input current, high-level test circuit for table XVI
Table XVII. Z input current, high-level test
Figure 21. Z input current, high-level test circuit for table XVII
Table XVII. Power supply current test
Figure 22. Power supply current test circuit for table XVIII
Table XIX. Power supply (low-level and high-level) regulation test
Figure 23. Power supply (low-level and high-level) regulation test circuit for table XIX
Table XX. Oscilaltor repitition period test
Figure 24. Oscilaltor repitition period test circuit for table XX
Table XXI. D output repitition period test
Figure 25. D output repitition period test circuit for table XXI
Figure 26. D output repitition period waveforms for table XXI
Table XXII. D output time interval and minimum S/R pulse width test
Figure 27. D output time interval and minimum S/R pulse width test circuit for table XXII
Figure 28. D output time interval waveforms for table XXII
Table XXIII. Timer 1-4 disable test
Figure 29. Timer 1-4 disable test circuit for table XXIII
Figure 30. Timer 1-4 disable waveforms for tbale XXIII
Table XXIV.Timer 2-4 output transition time test
Table XXIV.Timer 2-4 output transition time test (cont)
Figure 31.Timer 2-4 output transition test circuit for table XXIV
Figure 32.Timer 2-4 output transition time waveforms for table XXIV
Table XXV. Timer 2-4 reset propagation delay time test
Figure 33. Timer 2-4 reset propagation delay time (tPLH) test circuit for table XXV
Figure 34. Timer 2-4 reset propagation delay time waveforms for table XXV
Table XXVI. Q and Q output propagation delay time and transition time test
Figure 35. Q and Q output propagation delay time and transition time test circuit for table XXVI
Figure 36. Q and Q output propagation delay time and transition time waveforms for table XXVI
Table XXVII. T1-T4 output propagation delay time and transition time test
Figure 37. T1-T4 output propagation delay time and transition time test for table XXVII
Figure 38. T1-T4 output propagation delay time and transition time waveforms for table XXVII
Table XXVIII. Output crosstalk, low-level and high-level test
Table XXVIII. Output crosstalk, low-level and high-level test (cont)
Table XXVIII. Output crosstalk, low-level and high-level test (cont)
Table XXVIII. Output crosstalk, low-level and high-level test (cont)
Figure 39. Output crosstalk test circuit for table XXVIII
Figure 40. Output crosstalk low-level and high-level waveforms for table XXVIII
Table XXX. Power supply transient amplitude test
Figure 41. Power supply transient amplitude test circuit for table XXIX
Figure 42. Power supply transient amplitude waveforms for table XXIX
Table XXX. Power supply filter capacitance test
Table XXXI. Input capacitance test
Figure 43. Input and filter capacitance test circuit for tables XXX and XXXI
Standardization Document Improvement Proposal
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Modules, Standard Electronic, Programmable Timer, Digital, Key Code HQE

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