Modules, Standard Electronic, Gate, And-or-Invert, Digital, Key Code AMH

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Modules, Standard Electronic, Gate, And-or-Invert, Digital, Key Code AMH

Modules, Standard Electronic, Gate, And-or-Invert, Digital, Key Code AMH
Performance Requirements
Figure 1. AMH module function diagram, AND-OR-INVERT gate
Table I. Module electronic requirements
Table I. Module electronic requirements (Cont)
Table I. Module electronic requirements (Cont)
Table I. Module electronic requirements (Cont)
Table I. Module electronic requirements (Cont)
Table I. Module electronic requirements (Cont)
Qualification Testing
Table II. Input to output relationship
Dynamic Power Dissipation
Figure 2. Operating temperature and life test circuit
Figure 3. Component temperature test circuit
Figure 4. Vibration test circuit
Table III. Isolation test
Figure 5. Isolation test circuit for table III
Table IV. Input clamp diode voltage (negative) test
Table V. Input clamp diode voltage (positive) test
Figure 6. Input clamp diode voltage (negative and positive) test circuit for tables IV and V
Table VI. Output leakage current (high-level) test
Figure 7. Output leakage current (high-level and low-level) test circuit for tables VI and VII
Table VIII. Static output voltage (high-level) test
Figure 8. Static output voltage (high-level and low-level) test circuit for tables VIII and IX
Table X. Static output voltage (high-level) test
Figure 9. Static output voltage (high-level) test for table X
Figure 10. Static output voltage (low-level) test for table XI
Table XII. Static output voltage (high-level) test
Figure 11. Static output voltage (high-level and low-level) test circuit for tables XII and XIII
Table XIV. Functional test
Table XIV. Functional test (cont)
Table XIV. Functional test (cont)
Table XIV. Functional test (cont)
Figure 12. Functional test circuit for table XIV
Table XV. Input current (high-level) test
Table XV. Input current (high-level) test (cont)
Table XV. Input current (high-level) test (cont)
Figure 13. Input current (high-level) test circuit for table XV
Table XVI. Input current (low-level) test
Table XVI. Input current (low-level) test (cont)
Table XVI. Input current (low-level) test (cont)
Figure 14. Input current (low-level) test circuit for table XVI
Table XVII. Static power supply current (low-level and high-level) test
Figure 15. Static power supply current (low-level and high-level) test circuit for table XVII
Table XVIII. Transition time (tTLH) test
Table XIX. Transition time (tTHL) test
Table XX. Propagation delay time (tPLH) test
Table XX. Propagation delay time (tPLH) test (cont)
Table XX. Propagation delay time (tPLH) test (cont)
Table XX. Propagation delay time (tPLH) test (cont)
Table XX. Propagation delay time (tPLH) test (cont)
Table XX. Propagation delay time (tPLH) test (cont)
Table XX. Propagation delay time (tPLH) test (cont)
Table XX. Propagation delay time (tPLH) test (cont)
Table XXI. Propagation delay time (tPHL) test
Table XXI. Propagation delay time (tPHL) test (cont)
Table XXI. Propagation delay time (tPHL) test (cont)
Table XXI. Propagation delay time (tPHL) test (cont)
Table XXI. Propagation delay time (tPHL) test (cont)
Table XXI. Propagation delay time (tPHL) test (cont)
Table XXI. Propagation delay time (tPHL) test (cont)
Table XXI. Propagation delay time (tPHL) test (cont)
Figure 16. Transition time (tTLH and tTHL) and propagation delay time (tPLH and tPHL) test circuit
Figure 17. Transition time (tTLH and tTHL) and propagation delay time (tPLH and tPHL) test circuit waveforms
Figure 18. Transition time (tTLH and tTHL) and propagation delay time (tPLH and tPHL) test circuit waveforms
Table XXII. Disable delay time (tPZH) test
Table XXIII. Disable delay time (tPHZ) test
Table XXIV. Disable delay time (tPZL) test
Table XXV. Disable delay time (tPLZ) test
Figure 19. Disable delay time (tPZH, tPHZ, tPZL, and tPLZ) test circuit for tables XXII through XXV
Figure 20. Disable delay time (tPZH, tPHZ, tPZL, and tPLZ) test circuit waveforms for tables XXII through XXV
Table XXVI. Transition time (tTLH) test
Table XXVIII. Propagation delay time (tPLH) test
Table XXVIII. Propagation delay time (tPLH) test (cont)
Table XXVIII. Propagation delay time (tPLH) test (cont)
Table XXVIII. Propagation delay time (tPLH) test (cont)
Table XXIX. Propagation delay time (tPHL) test
Table XXIX. Propagation delay time (tPHL) test (cont)
Table XXIX. Propagation delay time (tPHL) test (cont)
Table XXIX. Propagation delay time (tPHL) test (cont)
Figure 21. Transition time (tTLH and tTHL) and Propagation delay time (tPLH and tPHL) test circuit
Figure 22. Transition time (tTLH and tTHL) and Propagation delay time (tPLH and tPHL) test circuit waveforms
Figure 23. Transition time (tTLH and tTHL) and Propagation delay time (tPLH and tPHL) test circuit waveforms
Table XXX. Disable delay time (tPZH) test
Table XXXII. Disable delay time (tPZL) test
Figure 24. Disable delay time (tPZH, tPHZ, tPZL, and tPLZ) test circuit for tables XXX through XXXIII
Figure 25. Disable delay time (tPZH, tPHZ, tPZL, and tPLZ) test circuit waveforms
Table XXXIV. Transition time (tTLH) test
Table XXXVI. Propagation delay time (tPLH) test
Table XXXVI. Propagation delay time (tPLH) test (cont)
Table XXXVI. Propagation delay time (tPLH) test (cont)
Table XXXVI. Propagation delay time (tPLH) test (cont)
Table XXXVII. Propagation delay time (tPHL) test
Table XXXVII. Propagation delay time (tPHL) test (cont)
Table XXXVII. Propagation delay time (tPHL) test (cont)
Table XXXVII. Propagation delay time (tPHL) test (cont)
Figure 26. Transition time (tTLH and tTHL) and Propagation delay time (tPLH and tPHL) test circuit
Figure 27. Transition time (tTLH and tTHL) and Propagation delay time (tPLH and tPHL) test circuit waveforms
Figure 28. Transition time (tTLH and tTHL) and Propagation delay time (tPLH and tPHL) test circuit waveforms
Table XXXVIII. Disable delay time (tPZH) test
Table XL. Disable delay time (tPZL) test
Figure 29. Disable delay time (tPZH, tPHZ, tPZL, and tPLZ) test circuit for tables XXXVIII through XLI
Figure 30. Disable delay time (tPZH, tPHZ, tPZL, and tPLZ) test circuit waveforms
Table XLII. Power supply filter capacitance test
Table XLIII. Input capacitance test
Table XLIV. Output capacitance test
Figure 31. Power supply filter capacitance, input and output capacitance test circuit
Standardization Document Improvement Proposal
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Modules, Standard Electronic, Gate, And-or-Invert, Digital, Key Code AMH

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