Module, Standard Electronic, Network, Special, Key Code HJL

Click here to make tpub.com your Home Page

Page Title: Module, Standard Electronic, Network, Special, Key Code HJL

Click here for thousands of PDF manuals

Web
www.tpub.com

Information Categories

....

Administration
Advancement
Aerographer
Automotive
Aviation
Construction
Diving
Draftsman
Engineering
Electronics
Food and Cooking
Logistics
Math
Medical
Music
Nuclear Fundamentals
Photography
Religion

Module, Standard Electronic, Network, Special, Key Code HJL

Module, Standard Electronic, Network, Special, Key Code HJL
Applicable Documents
Module Configuration Requirements
Table I. Module electrical requirements
Table I. Module electrical requirements (cont)
Table I. Module electrical requirements (cont)
Table I. Module electrical requirements (cont)
Circuit Pin Configurations
Figure 1. HJL functional block diagram and pin assignments
Figure 1. HJL functional block diagram and pin assignments (Cont)
Figure 1. HJL functional block diagram and pin assignments (Cont)
Qualification Testing
Figure 2. HJL operating temperature, component temperature and life test circuit
Figure 3. HJL vivbration test circuit
Packaging Requirements
Instrumentation Amplifier
Functional Description of I/O Pins
Functional Description of I/O Pins (cont)
Functional Description of I/O Pins (cont)
Description of Tests
Description of Tests (cont)
Table II. Isolation test
Figure 4. Isolation test circuit for table II
Table III. Maximum stress test
Figure 5. Maximum stress test circuit for table III
Table IV. Output short circuit current test
Figure 6. Output short circuit current test circuit for table IV
Table V. Continuity test
Figure 7. Continuity test circuit for table V
Table VI. Power supply current test
Figure 8. Power supply current test circuit for table VI
Table VII. PSFC test
Table VIII. Diode voltage drop test
Figure 9. PSFC and Diode voltage drop test circuit for tables VII and VIII
Table IX. Inductor check test
Table X. Resistance check test
Figure 10. Inductor and Resistance check test circuit for tables IX and X
Table XI. IAMP offset voltage test
Figure 11. IAMP offset voltage test circuit for table XI
Table XII. IAMP input bias and offset current test
Figure 12. IAMP input bias and offset current test circuit for table XII
Table XIII. IAMP input resistance test
Figure 13. IAMP input resistance test circuit for table XIII
Table XIV. IAMP gain accuracy test
Table XIV. IAMP gain accuracy test (cont)
Figure 14. IAMP gain accuracy test circuit for table XIV
Table XV. Output voltage swing test
Figure 15. Output voltage swing test circuit for table XV
Table XVI. IAMP CMRR test
Table XVI. IAMP CMRR test (cont)
Figure 16. IAMP CMRR test circuit for table XVI
Table XVII. IAMP PSS test
Table XVII. IAMP PSS test (cont)
Figure 17. IAMP PSS test circuit for table XVII
Table XVIII. IAMP settling time test
Figure 18. IAMP settling time test circuit for table XVIII
Figure 19. Waveforms for settling time test for figure 18
Table XXI. IAMP slew rate test
Figure 20. IAMP slew rate test circuit for table XIX
Figure 21. Waveforms for slew rate test for figure 20
Table XX. BAMP offset voltage test
Table XXI. BAMP bias current test
Figure 22. BAMP offset voltage and bias current test circuit for tables XX and XXI
Table XXII. BAMP voltage swing test
Figure 23. BAMP voltage swing test circuit for table XXII
Table XXIII. BAMP slew rate test
Figure 24. BAMP slew rate test circuit for table XXIII
Figure 25. Waveforms for slew rate test for figure 24
Table XXIV. Output voltage swing test
Figure 26. Output voltage swing test circuit for table XXIV
Table XXV. RMS-DC offset voltage test
Figure 27. RMS-DC offset voltage test circuit for table XXV
Table XXVI. RMS-DC input resistance test
Figure 28. RMS-DC input resistance test circuit for table XXVI
Table XXVII. RMS-DC nonlinearity test
Table XXVII. RMS-DC nonlinearity test (cont)
Table XXVII. RMS-DC nonlinearity test (cont)
Table XXVII. RMS-DC nonlinearity test (cont)
Table XXVIII. RMS-DC PSS test
Table XXIX. RMS-DC reversal error test
Figure 29. RMS-DC nonlinearity, PSS and reversal error test circuit for tables XXVII, XXVIII and XXIX
Table XXX. RMS-DC total error test
Figure 30. RMS-DC total error test circuit for table XXX
Table XXXI. Crest factor error test
Figure 31. Crest factor error test circuit for table XXXI
Figure 32. Input waveform for crest factor test circuit for figure 31
Table XXXII. Ripple voltage test
Figure 33. Ripple voltage test circuit for table XXXII
Table XXXIII. RMS-DC input resistance test
Figure 34. RMS-DC input resistance test circuit for table XXXIII
Table XXXIV. Frequency response test
Figure 35. Frequency response test circuit for table XXXIV
Standardization Document Improvement Proposal

Module, Standard Electronic, Network, Special, Key Code HJL

Privacy Statement - Press Release - Copyright Information. - Contact Us

Integrated Publishing, Inc. - A (SDVOSB) Service Disabled Veteran Owned Small Business