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Circuit diagram and terminal connections. |
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|  MIL-M-38510/101H
3. REQUIREMENTS
3.1 Qualification. Item furnished under this specification shall be products that are manufactured by a manufacturer
authorized by the qualifying activity for listing on the applicable qualified manufacturers list before contract award (see 4.3 and
6.2).
3.2 Item requirements. The individual item requirements shall be in accordance with MIL-M-38510, and as specified herein.
The individual item requirements for devices marked with the "Q" certification mark shall be in accordance with MIL-PRF-
38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification
in the QM plan shall not affect the form, fit, or function as described herein.
3.3 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-M-38510 and 1.2.3 herein.
3.3.1 Circuit diagram and terminal connections. The circuit diagram and terminal connections shall be as specified on
figure 1.
3.3.2 Schematic circuits. The schematic circuits shall be submitted to the preparing activity prior to inclusion of
manufacturer's device in this specification and shall be submitted to the qualifying activity and preparing activity (DSCC-VAS)
as a prerequisite for qualification. All qualified manufacturer's schematics shall be maintained by the preparing activity and will
be available upon request. A typical schematic circuit shall be as specified on figure 2.
3.3.3 Case outlines. The case outlines shall be as specified in 1.2.3.
3.4 Lead material and finish. Lead material and finish shall be in accordance with MIL-M-38510.
3.5 Electrical performance characteristics. The following electrical performance characteristics apply over the full operating
ambient temperature range of -55C to +125C and for supply voltages 5 V dc to 20 V dc, unless otherwise specified (see
table I).
3.5.1 Offset null circuits. Each amplifier having nulling inputs (device types 01, 02, 03, 05, and 07) shall be capable of
being nulled 1 mV beyond the specified offset voltage limits for -55C ≤ TA ≤ +125C using the circuits of figure 3.
3.5.2 Frequency compensation. Device types 01, 02, 07, and 08 shall be free of oscillation when operated in a unity gain
non-inverting mode with no external compensation and a source resistance of ≤ 10 kΩ, and when operated in any test
condition specified herein. Device types 03, 04, 05, and 06 shall be free from oscillation when compensated with a 30 pF
capacitor for all gain configurations or a 3 pF capacitor when used with a gain of 10.
3.6 Rebonding. Rebonding shall be in accordance with MIL-M-38510.
3.7 Electrical test requirements. Electrical test requirements for each device class shall be the subgroups specified in table
II. The electrical tests for each subgroup are described in table III.
3.8 Marking. Marking shall be in accordance with MIL-M-38510.
3.9 Microcircuit group assignment. The devices covered by this specification shall be in microcircuit group number 49 (see
MIL-M-38510, appendix E).
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