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| TABLE III. Group A inspection for device type 03 Continued.
Terminal conditions 2/
1/ Normal clock pulse: (VIL < 0.8 V, VIH > 2.0 V).
2/ Terminal conditions (pins not designated may be H > 2.0 V, or L < 0.8 V, or open).
3/ Output voltages shall be either:
(a) H = 2.4 volts minimum and L = 0.4 volt maximum when using a high speed checker double comparator, or
(b) H > 1.5 volts and L < 1.5 volts when using a high speed checker single comparator.
(c) X = Don't care.
4/ Only a summary of attributes data is required.
5/ A > 2.0 V, B < 0.8 V. Input voltages shown are the maximum for VIL and the minimum for VIH.
6/ FMAX, minimum limit specified is the frequency of the input pulse. The output frequency shall be one-half of the input frequency.
7/ Apply 1 clock pulse prior to input pulses.
8/ Apply momentary GND, then 4.5 volts prior to input pulses, maintain 4.5 volts during test.
9/ Minimum limit for circuit C shall be -0.5 mA.
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