 |
|||
|
Page Title:
Table 3. Group A inspection for device type 09-cont. |
|
||
| ||||||||||
|
|  TABLE III. Group A inspection for device type 09 Continued.
Terminal conditions 17/
1/
Output voltages shall be either:
(a) H = 2.4 volts minimum and L = 0.4 volt maximum when using a high speed checker double comparator, or
(b) H ≥ 1.5 volts and L < 1.5 volts when using a high speed checker single comparator.
2/
Only a summary of attributes data is required.
3/
A >2.0 V, B <0.8 V. Input voltages shown are the maximum for VIL and the minimum for VIH.
4/
See figure 9A. Apply waveform E for tests 161 and 178, and waveform H for tests 162 and 179.
5/
See figure 9, waveforms A, B, C, and D. Load AIN, then apply waveform A and observe the drop in QA output.
6/
See figure 9, waveforms B, C, and D. Load AIN, and observe tPLH of waveform D at output QA.
7/
Repeat steps as in note 6. Observe the pulse delay of the drop in QA when the load pulse is applied.
8/
See figures 9 and 9A, waveforms A, B, C, E, F, and G. First use clear pulse, then load pulse, then one count up pulse. Also see figure 9B, note 7.
9/
See note 8, add one more count up pulse for tPLH9 as shown on figure 9A, waveforms F and G.
10/
See figures 9 and 9A. First clear pulse, then one count down pulse.
11/
See note 9. Clear pulse first, figure 9, waveforms A, B, and C, add one more count down pulse for tPLH10 as shown on figure 9A,
waveforms J and K.
12/
See figures 9 and 9A. First a clear pulse, then one count up pulse for QA. On next three tests enter count up pulses to appropriate
count to check QB, QC, and QD.
13/
See figure 9A, waveforms H and J. On next three tests enter count down pulse, waveform H and observe tPHL11, waveform J on
outputs QC, QB, and QA.
14/
FMAX, minimum limit specified is the frequency of the input pulse. The output frequency shall be one-half of the input frequency.
15/
Load pulse before count up input, then 4.5 V.
16/
Load pulse before count down input, then 4.5 volts.
Terminal conditions (pins not designated may be H ≥ 2.0 V, or L ≤ 0.8 V, or open).
17/
18/
The limits shall be: -0.5 mA minimum, -1.3 mA maximum for circuit C, and -0.7 mA minimum, -1.6 mA maximum for all other circuits.
19/
The limits shall be -0.5 mA minimum and -1.3 mA maximum for circuit E.
|
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |
Click
here for thousands of PDF manuals