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| TABLE III. Group A inspection for device type 02. 1/ - Continued.
Subgroup
Symbol
MIL-
Case A, B, D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Test limits
STD-883
Meas.
Case C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
method
terminal
Test No.
Clock 1
Clear 1
K1
VCC
Clock 2
Clear 2
J2
Q2
K2
GND
Q1
J1
Min
Max
Unit
Q
Q1
2
10
tPHL2
3003
117
IN
5.0 V
2.4 V
5.0 V
GND
OUT
2.4 V
Clock 1
5
50
ns
TC = 125C
to Q1
"
"
"
118
IN
5.0 V
2.4 V
"
"
OUT
2.4 V
Clock 1
"
"
"
to Q 1
"
"
"
119
"
IN
5.0 V
2.4 V
OUT
2.4 V
"
Clock 2
"
"
"
to Q2
"
"
"
120
"
IN
5.0 V
2.4 V
OUT
2.4 V
"
Clock 2
"
"
"
to Q 2
Same tests, terminal conditions and limits as for subgroup 10, except TC = -55C.
11
NOTES:
A = Normal clock pulse.
B = Momentary GND, then 4.5 V.
C = This note has been deleted.
D = Momentary 4.5 V, then GND.
E = Momentary ground, then 2.4 V.
F = Momentary ground, then 5.5 V.
J = This note has been deleted.
* After clock pulse apply 12 mA to clock pin to insure Q is still in the low state (see figure 15).
** Test time limit ≤ 100 ms.
1/ Terminal conditions (pins not designated may be H ≥ 2.0 V, or L ≤ 0.8 V, or open.)
2/ Input voltages shown are: A = 2.0 V minimum and B = 0.8 V maximum.
3/ Output voltages shall be either: (a) H = 2.4 V, minimum and L = 0.4 V, maximum when using a high speed checker double comparator; or (b)
H ≥ 1.5 V and L < 1.5 V when using a high speed checker single comparator.
4/ Tests shall be performed in sequence.
5/ Input shall be one normal clock pulse, then 4.5 V
6/ FMAX, minimum limit specified is the frequency of the input pulse. The output frequency shall ge one-half of the input frequency.
7/ For CKT A, IIH3 limits are 0 to 120 A.
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