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| TABLE III. Group A inspection for device type 02 - Continued.
Terminal conditions (pins not designated may be high ≥ 2.0 V; low ≤ 0.7 V; or open).
Cases
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MIL-STD-
A,B,C,D
Subgroup
Symbol
883
Case
2
3
4
6
8
9
10
12
13
14
16
18
19
20
Measured
Limits
Unit
method
2
terminal
Test no.
1A
1CLR
1QA
1QB
1QC
1QD
GND
2QD
2QC
2QB
2QA
2CLR
2A
VCC
Min
Max
10
FMAX1
25
MHz
Tc = 125C tPLH1
Same tests and terminal conditions as for subgroup 9, except TC = 125C.
2
33
ns
tPHL1
"
33
"
tPLH2
"
93
"
tPHL2
"
93
"
tPHL3
"
56
"
Same tests and terminal conditions as for subgroup 10, except TC = -55C.
11
Tc = -55C
┌──┐ - - 2.0 V min./5.5 V max. to clear input and then to A input sufficient times prior to test to set the output high.
1/
Apply
┘ └0.0 0.2 V
┌──┐ - - 2.0 V min./5.5 V max. pulse prior to test.
2/
Apply
┘└
0.0 0.2 V
3/
IIL limits shall be as follows:
Min/Max limits (mA)
Test
Circuits
A
E
B
D
F
IIL1
-.15/-.38
-.12/-.36
-.16/-.40
-.12/-.36
-.12/-.36
IIL2
-.35/-1.60
-1.0/-2.4
-.35/-1.60
-.35/-1.60
-.35/-1.60
4/
A = 2.4 V min. and B = 0.4 V max.
5/
Output voltages shall be either:
a. H ≥ 2.5 V and L ≤ 0.4 V max when using a high speed checker double comparator, or
b. H ≥ 1.5 V and L ≤ 1.5 V when using a high speed checker single comparator.
6/
FMAX1 minimum limit specified is the frequency of the input pulse.
The output pulse shall be one half the input frequency.
┌──┐
7/
Apply sufficient
- - 2.0 V min./5.5 V max. pulses to set output high prior to test.
0.0 0.2 V
┘└
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