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| ![]() MIL-M-38510/372B
1.3 Absolute maximum ratings.
Supply voltage range .............................................................................
-0.5 V dc to +7.0 V dc
Input voltage range ................................................................................
-1.5 V dc at -18 mA to +7.0 V dc
-65 to +150C
Storage temperature range ....................................................................
Maximum power dissipation (PD), per device: 1/
Device 01 .........................................................................................
104.5 mW
Device 02 .........................................................................................
77 mW
Device 03 .........................................................................................
148.5 mW
Device 04 .........................................................................................
170.5 mW
+300C
Lead temperature (soldering, 10 seconds) .......................................
Thermal resistance, junction to case (θJC):
Cases E, F, R, S, and 2 ........................................................................
(See MIL-STD-1835)
175C
Junction temperature (TJ) 2/ ...................................................................
1.4 Recommended operating conditions.
Supply voltage (VCC) .............................................................................. 4.5 V dc minimum to 5.5 V dc
maximum
Minimum high level input voltage (VIH) ................................................... 2.0 V dc
Maximum low level input voltage (VIL) .................................................... 0.8 V dc
Normalized fanout (each output) 3/ ........................................................ 10 maximum at low logic level
20 maximum at high logic level
Case operating temperature range (TC) ................................................. -55 to +125C
Minimum width of clock pulse (tP(CLK))
type 01, 02 25C ......................................................................... 10 ns
-55/125C .................................................................. 12.5 ns
25C ......................................................................... 14 ns
type 04
-55/125C .................................................................. 16.5 ns
Minimum width of clear pulse (tP(CLEAR))
type 01, 02 ....................................................................................... 15 ns
Minimum width of enable pulse (tP(ENABLE))
type 03 ............................................................................................. 10 ns
Minimum setup time before clock (tSETUP)
type 01, 02 ....................................................................................... 16 ns
type 04 ............................................................................................. 10 ns
Minimum hold time after clock (tHOLD)
type 01, 02 ....................................................................................... 0 ns
type 04 ............................................................................................. 4 ns
Minimum setup time before enable (tSETUP)
type 03 ............................................................................................. 10 ns
Minimum hold time after enable (tHOLD)
type 03 ............................................................................................. 7 ns
Minimum clear inactive state time before clock
type 01, 02 ....................................................................................... 8 ns
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1/ Must withstand the added PD due to short-circuit test (e.g., IOS).
2/ Maximum junction temperature should not be exceeded except in accordance with allowable short
duration burn-in screening condition in accordance with MIL-PRF-38535.
3/ The device should fanout in both high and low levels to the specified number of inputs of the same
device type as that being tested.
2
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