Microcircuits, Digital, High Speed, CMOS, NAND Gates, Monolithic Silicon, Positive Logic

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Microcircuits, Digital, High Speed, CMOS, NAND Gates, Monolithic Silicon, Positive Logic

Microcircuits, Digital, High Speed, CMOS, NAND Gates, Monolithic Silicon, Positive Logic
Recommended operating conditions.
Design, construction, and physical dimensions.
Screening.
Percent defective allowable (PDA).
Table 1. Electrical performance characteristics.
Table 1. Electrical performance characteristics-cont.
Table 1. Electrical performance characteristics-cont.
Table 1A. Calculated dynamic figures at 55/25 case temperature (C).
Table 2. Electrical test requirements.
Table 4. Delta limits at 25C.
Figure 1. Logic diagram and terminal connections (top views).
Figure 1. Logic diagram and terminal connections (top views) (Device type 03)
Figure 2. Truth tables and logic equations.
Figure 2. Truth tables and logic equations (Device type 04)
Figure 3. Switching time test circuit and waveforms.
Table 3. Group A inspection for device type 01.
Table 3. Group A inspection for device type 01-cont.
Table 3. Group A inspection for device type 01-cont.
Table 3. Group A inspection for device type 02
Table 3. Group A inspection for device type 02-cont.
Table 3. Group A inspection for device type 02-cont.
Table 3. Group A inspection for device type 03
Table 3. Group A inspection for device type 03-cont.
Table 3. Group A inspection for device type 03-cont.
Table 3. Group A inspection for device type 04
Table 3. Group A inspection for device type 04-cont.
Table 3. Group A inspection for device type 04-cont.
Table 3. Group A inspection for device type 05
Table 3. Group A inspection for device type 05-cont.
Table 3. Group A inspection for device type 05-cont.
Schematic diagram
Packaging requirements.
Qualification.
Standardization Document Improvement Proposal
Custodians

Microcircuits, Digital, High Speed, CMOS, NAND Gates, Monolithic Silicon, Positive Logic

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