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Page Title: Table 1. Electrical performance characteristics and post irradiation end-point electrical parameter limits-cont.
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MIL-M-38510/762A
Table I. Electrical performance characteristics and post irradiation
end point electrical parameter limits. - Continued
1/
Each input/output, as applicable shall be tested at the specified temperature for the specified limits. Output terminals not
designated shall be high level logic, low level logic, or open, except as follows:
a. VIC (pos) tests, the GND terminal can be open. TC = +25 C.
b. VIC (neg) tests, the VCC terminal shall be open. TC = +25 C.
c. ICC tests, the output terminal shall be open.
Additional detailed information on qualified devices (i.e., pin for pin conditions and testing sequence) is available from the
qualifying activity (DSCC - VQ) upon request.
2/
The word "All" in the device type column, means non-RHA and RHA pre-irradiation limits for all devices. Where M, D, L,
and R in the conditions column are post-irradiation limits for those device types specified in the device type column.
3/
This parameter is provided as design information only.
4/
RHA samples do not have to be tested at either -55 C or +125 C prior to irradiation.
5/
When performing post irradiation electrical measurements for any RHA level TA = +25 C. Limits shown are guaranteed at
TA = +25 C +5 C.
6/
Transmission driving tests are performed at VCC = 5.5 V dc with a 2 ms duration maximum.
7/
Three-state output conditions are required. For IOZL, set outputs to high state. For IOZH, set outputs to low state. Set input
pins to VIL = VIL(MAX) and VIH = VIH(MIN) as required.
8/
Set output enable control pins to VCC or GND, as applicable, to disable the outputs.
9/
Power dissipation capacitance (CPD), is provided for design information only and is guaranteed but not tested. CPD
determines the no load dynamic power consumption, PD = (CPD + CL) (VCC x VCC) f + (ICC x VCC), and the dynamic current
consumption, IS = (CPD + CL) VCC f + ICC.
10/
This test is for qualification only. Ground bounce tests are performed on a nonswitching (quiescent) output and are used to
measure the magnitude of induced noise caused by other simultaneously switching outputs. The test is performed on a
low noise bench test fixture with all outputs fully dc loaded (IOL maximum and IOH maximum = i.e, 24 mA) and 50 pF of load
capacitance (see figure 3). The loads must be located as close as possible to the device output. Inputs are then
conditioned with 1 MHz pulse (tr = tf = 3.5 +1.5ns) such that one output is forced low and all others (possible) are
switching simultaneously and in phase. The low level ground bounce noise is measured at the quiet output using a F.E.T.
oscilloscope probe with at least 1 M  impedance. Measurement is taken from the peak of the largest positive pulse with
respect to the nominal low level output voltage (see figure 3). The device inputs are then conditioned such that the output
under test is at a high nominal VOH level. The high level ground bounce measurement is then measured from nominal VOH
level to the largest negative peak. This procedure is repeated such that all outputs are tested at a high and low level with
a maximum number of outputs switching.
11/
See JEDEC STD. 17 for electrically induced latch-up test methods and procedures. The values listed for Vtrigger' Itrigger and
Vover' are to be accurate within +5 percent.
12/
Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic
patterns used for fault detection. Functional tests shall be performed in sequence as approved by the qualifying activity
on qualified devices. H > 2.5 V, L < 2.5 V; high inputs = 3.7 V and low inputs = 0.6 V for VCC = 4.5 V and H > 1.5 V, L <
1.5 V; high inputs = 2.5 V and low inputs = 0.45 V for VCC = 3.0 V. Tests at VCC = 3.0 V are for RHA specified devices
only (TA = +25 C +5 C).
13/
Devices are tested at VCC = 3.0 V and VCC = 4.5 V at TC = +125 C for sample testing and at VCC = 3.0 V and VCC = 4.5 V at
TC = +25 C for screening. Other voltages of VCC and temperatures are guaranteed, if not tested, see 4.4.1d.
14/
AC limits at VCC = 5.5 V are equal to limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum ac limits for
VCC = 5.5 V are 1 ns and guaranteed by guardbanding VCC = 4.5 V limits to 1.5 ns.
11

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