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| MIL-N-85005A(AS)
3.5.8.4.7
Inertial Platform Interface - The SDC shall provide
interface with the CN-1231/ASN-84 Gyroscope Assembly. This interface
function shall utilize protected power from the PP-4964/ASN-84 Power
supply.
3.5.8.4.7.1
Accelerometer Sensing Signals - Accelerometer inputs
of plus and minus pulses for both X and Y accelerometers shall be pro-
vided. The Plus and minus pulses shall be accumulated in up-down counters
for each acceleraometer. Accumulator output shall be available upon
request by the NC.
3.5.8.4.7.2
Gyro Torquing Signals - Gyro torquing commands from
the NC shall be converted into gyro pulse torquing commands for X, Y,
and Z gyro torquing channels.
Resolver to Synchro Conversion - The SDC shall also
3.5.8.4.7.3
of the azimuth resolver single speed analog input as
provide conversion
noted in 3.5.8.4.1 to 3 wire synchro, 11.8 V line to line, 400 Hz, Phase
A signal.
DPU Interface - Transmission of data between the SDC
3.5.8.4.8
and NC shall be on two wire differential line drivers (Fairchild A9614
or equivalent) and receivers (Fairchild A9615 or equivalent).
Data Channels - Serial binary data channels shall be
3.5.8.4.8.1
used for transferring 16-bit words from NC to the SDC and from SDC to
the NC.
3.5.8.4.8.2
SDC Interrupt - A 0.5 sec pulse to the NC shall
signal that the SDC has finished the last task assigned by the NC.
Command Clocks - I/O clocks, consisting of sixteen
3.5.8.4.8.3
(16) 250 sec pulses at 1.0 MHz, shall be used to transfer data from the
NC to the SDC, and from SDC to the NC.
*3.5.8.4.8.4
Command Reset - A 250 nanosecond pulse from the NC
to the SDC shall signal that the next data transfer will be a new
command word from the NC. The command word specifies the type of data
transfer to follow and the device with which the transfer will be made.
4 MHZ Clock - A continuously running, precision
3.5.8.4.8.5
clock at 4 MHz shall be provided for use by SDC conversion circuits.
3.5.8.4.9
AQA-7 Interface - The SDC shall obtain range, bearing
and program data from the SS-1 and SS-2 AQA-7 (DIFAR) memory units
(Paragraph 6.8) and provide these data to the NC on the data channel of
3.5.8.4.8. The SDC interface shall be compatible with AQA-7's in accor-
dance with MIL-C-81486 and AS-1283 when installed in any combination in
SS-1 and SS-2.
ARR-72 Interface - The SDC shall interface with the
3.5.8.4.10
eight Dual Channel Control Indicators, four each at Sensor Station 1 and
Sensor Station 2. (Refer to Paragraph 6.8.) Each DCCI contains two
channels of RF intonation. Each channel provides a two-digit RF number
from 00 through 31 in BCD format of six bits. The SDC shall interleave
the RF numbers obtained from the ARR-72 on the data channel of 3.5,8.4.8
to the NC.
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