18 December 2003
9 April 1976
MICROCIRCUITS, LINEAR, TRANSISTOR ARRAYS, MONOLITHIC SILICON
This specification is approved for use by all Departments and Agencies of the Department of Defense.
Inactive for new design as of 10 July 1995
The requirements for acquiring the product herein shall consist of this specification sheet and MIL-PRF 38535
1.1 Scope. This specification covers the detail requirements for monolithic silicon transistor arrays. Two product
assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part
number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, (see 6.3)
1.2 Part or Identifying Number (PIN). The PIN should be in accordance with MIL-PRF-38535, and as specified
1.2.1 Device types. The device types should be as follows:
Two isolated NPN transistors and one NPN Darlington connected pair,
Three isolated NPN transistors and one NPN differentially connected pair,
1.2.2 Device class. The device class should be the product assurance level as defined in MIL-PRF-38535.
1.2.3 Case outline. The case outline should be as designated in MIL-STD-1835 and as follows:
GDFP5-F14 or CDFP6-F14
GDIP1-T14 or CDIP2-T14
GDFP1-F14 or CDFP2-F14
1/ Inactive package case outline.
Comments, suggestions, or questions on this document should be addressed to: Commander, Defense
Supply Center Columbus, ATTN: DSCC-VAS, 3990 East Broad St., Columbus, OH 43216-5000, or emailed
to email@example.com. Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at www.dodssp.daps.mil.
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.