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Page Title:
Discrete Inputs to CAU from Avionics |
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|  MIL-N-81604C(AS)
Appendix I
para 30.5.8.5
(cont)
d.
ADC Clock - The CAU shall provide a 1.2-MHz
clock to the ADC for clocking the ADC message.
This clock `shall always be available when air-
craft power is on, regardless of a CAU power
supply failure or off condition. The accuracy
shall be 0.1 percent and the pulse width shall
be 100 225 nanoseconds. The CAU line driver
shall be a Type 2 circuit.
30.5.9 CAU/Avionics Discrete Interface
30.5.9.1 Discrete Inputs to CAU from Avionics
a.
DOPLR No-Go - This discrete is not used in the
CAU but is retransmitted to the ANCU. This
CAU input from the DOPLR goes to a true (high)
state to indicate that the DOPLR has malfunc-
tioned or is in memory and that DOPLR data are
therefore invalid. The CAU line receiver shall
be a Type 3 circuit, except that line driver
power off and a source impedance greater than
2000 ohms or a line driver input open shall be
recognized as a true (no-go) state and pulled
up to 7 1 volts.
b.
ADC No-Go - This discrete is not used in the
CAU but is retransmitted to the ANCU. This CAU
input from the ADC goes to a true (high) state
to indicate that the air data computer has mal-
functioned and that ADC data are therefore
invalid. The CAU line receiver shall be a
Type 3 circuit.
c.
HARS No-Go - This discrete is supplied to the
CAU from the HARS for use in the CAU and re-
transmission to the ANCU. This CAU input from
the HARS goes to a true (high) state to indicate
that the HARS magnetic heading information is
not valid or is unsoothed. The CAU line
receiver shall be a Type 3 circuit.
d.
Flag Reset - This discrete is supplied to the
CAU from the SCRAM for use in the CAU and re-
transmission to the ANCU, CIU, PSU, and IMU to
reset the no-go flags in each of these units to
*
the no-fault (go) state. The flag reset input
*
from the SCRAM is a high (1) pulse, 250 25
*
msec in width. Absence of this pulse causes
*
176
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