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|  MIL-C-64025
Set the output of a DC power supply to 5.0 +
Power source.
0.1 volts. With the power supply off, connect the positive terminal
q
to +5V INPUT (A1-E23) and connect the negative terminal to GROUND (Al-
E18). Set the output of another DC power supply to 13.5+0.1 volts.
With the power supply off, connect the positive terminal to VBATT (A1-
E15) and connect the negative terminal to GROUND (A1-E18).
4.5.5.1 Reflectometer verification tests. Test setup per 3.7.1
and then turn both power supplies on. Apply an all zeros data pattern
(00000000) to the TUNE DATA (A1-E22), CLK (A1-E19), STROBE BUFF (Al-
E21) and STROBE BUFF- (A1-E20) inputs per Figure 5. Adjust the output
of a 50 ohm RF `signalsource to a frequency Fo (as specified in. the
9333026 drawing) and an amplitude of 5.5 + 0.2 VRMS when measured into
a SO ohm load. Note: For the subparagraphs that follow, the RF source
.
shall be turned off while changing load resistors.
4.5.5.1.1 Reflectometer output test (50 ohms). Connect a 50 +
-----
5% ohm 1 watt load resistor between RFOUT (A2-13) and GROUND (A1-E18),
-
connect the XFER RELAY input (A1-E16) to GROUND (A1-E18) and apply the "
RF signal of paragraph 4.5.5.1 to RFIN (between A1-14 and A1-E13).
Verify the VREFL output (A1-E17) is in compliance with the
requirements of 3.7.1.1 0
4.5.5.1.2 Reflectometer o u t p u t t e s t
(75 ohms).
Remove the 50
ohm load resistor between RFOUT and GROUND and replace with a 75 + 2%
ohm 1 watt resistor.
Verify the VREFL output is in compliance with
I
the requirements of 3.7.1 .2.
4.5.5.1.3 Reflectometer output, test (no load),
Remove the 75
I
ohm load resistor between RFOUT and GROUND. Verify the VREFL output is
in compliance with the requirements of 3.7.1.3.
4.5.5.2 Inductor element test. Apply data pattern A of Table 1
(para. 3.7.2.) to the TUNE DATA, CLOCK, STROBE BUFF and STROBE BUFF-
inputs per Figure 5. Verify the inductance between RFIN (A1-E14) and
RFOUT is in compliance with the requirements of paragraph 3.7.2,
Table 1, Pattern A. Apply each of the remaining data patterns of Table
1 and verify the inductance between RFIN and RFOUT is in compliance
with Table 1. .
4.5.5.3 Capacitor elements test.
Apply data pattern A of Table
2 (para.
3.7.3) to the TUNE DATA, CLOCK, STROBE BUFF and STROBE BUFF-
inputs per Figure 5. Verify the capacitance between RFOUT and Ground
(A1-E13) is in compliance with paragraph 3.7.3, Table 2, Pattern A.
Apply each of the remaining patterns of Table 2 and verify the
capacitance between RFOUT and Ground is in compliance with Table 2.
4.5.5.4 P o w e r
h a n d l i n g capability.
Adjust the output of a 50
ohm RF signal source to a frequency Fo and an amplitude of 24.5 + 0.5
VRMS into a 50 ohm load. Connect a 50 + 5% ohm 20 watt load (Table 3,
Load A) between RFOUT and GROUND. Apply data pattern A of Table 3
(para. 3.7.4) to the TUNE DATA, CLOCK, STROBE BUFF and STROBE BUFF-
inputs per Figure 5. Apply the previously adjusted RF source to RFIN
and verify that the power output is in compliance with paragraph
3.7.4, Table 3, Load A. Connect each of the remaining loads of Table 3
142
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