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Page Title:
Table II. Classification of defects. |
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|  MIL-C-70490(AR)
4.3 Inspection provisions.
4.3.1 Submission of product. Unless otherwise specified by
the contracting officer, inspection lot size, lot formation, and
presentation of lots shall be in accordance with "Submission of
Product" provision of MIL-STD-105.
4.3.2 Examination and tests.
4.3.2.1 Components and subassemblies. All components and
subassemblies shall be inspected in accordance with the inspection
provisions contained in Quality Assurance Provisions (QAP's)
listed in the Technical Data Package (TDP). In the absence of
QAP's, the applicable Quality Assurance Provisions of MIL-F-13926
shall apply.
4.4
Sampling.
4.4.1 Environmental/performance. The memory shall be
inspected to the requirements in Table II.
TABLE II.
Classification of defects.
No.
Characteristics
Requirement
Test procedure
100% Inspection
4.6.3
Memory read cycle
3.2.1.1
1.
4.6.4
RAM write cycle
2.
3.2.1.2
4.6.5
EPROM program cycle
3.2.1.3
3.
4.6.6
4.
EPROM erasure
3.2.1.4
4.6.7
RAM standby circuitry
3.2.1.5
5.
Common connector contact
6.
4.6.8
3.2.1.6
continuity
Pullup resistor
4.6.9
7.
3.2.1.7
4.6.1
ESS temperature
3.3.2
8.
4.6.2
ESS vibration
3.3.3
9.
MAJOR:
AQL 1.0% Defective
Workmanship
3.6
4.6.10
101.
4.4.2 Special sampling. One memory shall be selected at
random as a special sample from each lot or each 100 produced
which ever occurs first. The sample shall meet the requirements
and tests in Table III.
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