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|  MIL-C-70490(AR)
b. Verify the data written to RAM is correct by reading
data from RAM using the memory read cycle described in 3.2.1.1.
c.
Rotate to the right by 1 bit the data in the memory
location being tested and reverify the data for each rotation.
d.
Data shall be written as in a. thru c. to the full
range of RAM from hexadecimal address (COOO) to address (F7FF).
ee Write to the full range of RAM from hexadecimal
address (C000) to address (F7FF) with hexidecimal data (00) using
the RAM write cycle specified in 3.2.1.2.
f. Write to the RAM location being tested with
hexadecimal data (FF) using the RAM write cycle specified in
3.2.1.2.
g. -Verify that all RAM addresses that differ from the
test address by 1 bit contain hexadecimal data (00) by using the
memory read cycle described in 3.2.1.1.
h. Data shall be written as in e. thru g. to the full
range of RAM from hexadecimal address (C000) to address (F7FF).
4.6.5 EPROM program cycle. Before programming EPROM, 1 upper
bank and 1 lower bank shall be enabled by loading registers U36
and U37 with the data specified in 4.6.3. An EPROM program cycle
shall be accomplished by applying the signals specified in
3.2.1.3. The VPP connector contact for each bank is listed below
-
and shall have the following input specifications:
Parameter
Conditions
Minimum
Max imum
Units
20.5
High voltage
1 in=30mA max
21.5
volts DC
Low voltage
Open circuit
VPP Connector Contact
Upper Bank
o
P1-A40
1
P1-A42
2
P1-A44
P1-A46
3
VPP Connector Contact
Lower Bank
0
P1-A39
P1-A41
1
P1-A43
2
P1-A45
3
16
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