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MIL-D-81347C(AS)
3.5.1.4.8.4.1.1.2
Operate Mode Switch - The Operate Mode switch transmits data
to the ARO Logic Subunit to inform the Subunit which mode has been selected.
3.5.1.4.8.4.1.2
Master Timing - The ARO Logic Subunit derives a 33.3 Hz frame
sync signal from the 100 Hz clock generated by the MCPL. Initial output data requests for each frame
are a direct result of this frame sync signal.
3.5.1.4.8.4.1.3
ARO Displays - The ARO Logic Subunit transfers a 6-bit selection
and a 10-bit position parallel binary word together with a single unblank signal to each of the ARO Dis-
plays.
3.5.1.4.8.4.2
Interface Circuits - All signals shown in the ARO Logic functional
flow diagram, Figure 46, that have the symbol "TP" labelled on the line are transmitted via twisted
pair cables. The number inside the circle denotes the quantity of twisted pair signals entering or
leaving the subunit. All "TP" output lines from the subunit shall be driven by the line driver circuit as
specified in WR-101, Part II. All "TP" input lines shall use the input amplifier circuit specified in
Appendix 11,
3.5.1.4.8.4.3
Output Signal Characteristics
3.5.1.4.8.4.3.1
Deflection - Ten parallel data bits to each ARO (logical "O" =
+ 4 + 1 volts, logical "l" = 0.0 + 0.5 -0.0 volts) over twisted pair cables. Reference (00) position is
upper left corner of ARO Display screen.
3.5.1.4.8.4.3.2
Character Selection - Six parallel data bits to each ARO (logical
"0" = + 4 1 volts, logical "l" = 0.0 + 0.5 -0.0 volts) over twisted pair cables. Figure 49 illustrates
the octal code for character selection as transmitted to the ARO Displays.
3.5.1.4.8.4.3.3
Unblank - One signal to each ARO (logical "0" = + 4 1 volts,
logical "l" = 0.0 + 0.5 -0.0 volts) over twisted pair cables.
3.5.1.4.8.4.3.4
Output Data Request - One signal to the computer (logical "O" =
+ 4 1 volts, logical "1" = 0.0 + 0.5 - 0.0 volts).
3.5.1.4.8.4.3.5
Input Data and Input Data Request - Thirty data lines plus one
control line shall be used for transmittal of diagnostic information to the computer. A logical "O" =
+ 4 1 volts, alogical "1" = 0.0 + 0.5 - 0. 0 volts.
3.5.1.4.8.4.3.6
Test Indicator - One line to each ARO which is the ARO ground
when the ARO Test Mode switch is in one of the two test positions, and "open" when the ARO Test
Mode switch is in the "On Line" position. These lines shall be transmitted via the MCP.
3.5.1.4.8.4.4
Input Signal Characteristics
3.5.1.4.8.4.4.1
Data -24 parallel data bits from the Maintenance Control Panel
(logical "0" = 0.0 +0.5-0.0 volts, logical "1" = + 5 1.5 volts).
3.5.1.4.8.4.4.2
Output Acknowledge - One signal from the computer via the
Maintenance Control Panel (logical "0" = 0.0 + 0.5 - 0.0 volts, logical "1" = + 5 1.5 volts).
Switch Signals - Signals from the ARO Mode switch located on the
3.5.1.4.8.4.4.3
Maintenance Control Panel (logical "0" = open switch contact, logical "1" = 0 volts).
100 Hz Clock - A square wave signal originating from the MCPL.
3.5.1.4.8.4.4.4
This signal is derived from the 400 Hz power source, and therefore has a tolerance of 10%.
ARO Ground - The ARO ground line from each ARO Display shall
3.5.1.4.8.4.4.5
be used to control the illumination of the Test Indicators on the ARO Displays when the ARO Test Mode
switch is in either of the test positions. These grounds shall be isolated at the MCP from the DPS.
84

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