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Data Analysis Logic Unit MX-9360/AYA-8B (Logic Unit 4) |
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|  MIL-D-81347C(AS)
Data Analysis Logic Unit MX-9360/AYA-8B (Logic Unit 4)
3.5.4
Function - See 3.4.10
3.5.4.1
Form Factor - Refer to illustration in EI-515, Avionics Instal-
3.5.4.2
lation Instructions for Data Analysis Programming Group AN/AYA-8B.
Weight - See 3.5.1.3
3.5.4.3
Contents - See 3.4.5
3.5.4.4
Data Multiplexer Subunit (DMS)
3.5.4.4.1
Functional Description - The computer will be capable of ser-
3.5.4.4.1.1
vicing 16 input peripheral equipments and 16 output peripheral equipments utilizing the normal input
and output data transfer. The rate and priority of the data to many of the peripherals will not demand
real time access to the computer memory, i. e. , many of the peripherals will be able to communicate
with the computer via a buffer unit. The DMS will be such a unit. The DMS will be basically a multi-
pole, multithrow logic switch under direct computer control, servicing a number of peripheral I/O's.
Figure 139 is a functional flow diagram of the DMS.
General Description - The DMS shall provide the capability of
3.5.4.4.1.2
transmitting 30 data bits to and from each of seven peripheral equipments and the computer via a
single input/output computer channel. An additional channel shall be provided to loop computer output
data back as computer input data through a minimum amount of DMS logic.
Operating Requirements
3.5.4.4.1.3
Data Transfer -- Peripheral Equipment and the DMS to the
3.5.4.4.1.3.1
Computer - Communications between the DMS and the computer shall be in accordance with Appendix
L A peripheral which connects with the computer via the DMS shall be able to transmit up to 30 bit
data words to the computer using Input Data Request (IDR), Input Acknowledge (IA) or up to 26 bit data
words to the computer using External Interrupt (EI). There shall be four input words, Peripheral
IDR. IDR Monitor EI, Peripheral EI, and DMS Status EL If more than one of these inputs occurs at
the same time, the following table shall determine which input shall be transmitted to the computer first.
The Power Monitor EI for Logic Unit 4 as described in 3, 5.4.4 .1.3.1 (5) shall also be generated in the
DMS and it shall be transmitted to the computer as an overriding input.
INPUT WORD PRIORITY
INPUT WORD
PRIORITY
Power Monitor EI
Highest 1
Peripheral EI
2
IDR Monitor EI
3
4
DMS Status EI
Peripheral IDR
Lowest 5
(1) Periheral IDR - Data transfer using IDR shall be under
computer control. By outputting a DMS Instruction F see 3.5.4.4.1.5) the computer shall be able
to select one and only one DMS Input Channel to input via IDR.
When an input peripheral raises an IDR to the selected
DMS channel, the IDR and up to a 30-bit data word shall be routed directly to the computer. The
acknowledge signal shall be routed directly to the peripheral when the computer acknowledges the
IDR. The IDR input interface to the selected peripheral shall function as if the peripheral were inter-
facing directly with the computer.
227
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