Modules, Standard Electronic, Multiplexer, Digital, Key Code KDC

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Modules, Standard Electronic, Multiplexer, Digital, Key Code KDC

Modules, Standard Electronic, Multiplexer, Digital, Key Code KDC
Module Function
Table I. Input to output relationship for each multiplexer
Failure Rate Requirements
Figure 1. KDC module function diagram, two input multiplexer
Table I. Module electrical requirements
Table I. Module electrical requirements (cont)
Table I. Module electrical requirements (cont)
Quality Assurance Provisions
Qualification Testing
Figure 2. Operating temperature and life test circuit
Figure 3. Component temperature test circuit
Figure 4. Vibration test circuit
Table III. Isolation test
Figure 5. Isolation test circuit for table III
Figure 6. VOUT (low-loaded) test circuit for table IV
Table V. Input breakdown current test
Table V. Input breakdown current test (cont)
Table VI. Output short circuit current test
Figure 7. Input breakdown current test for table V
Figure 8. Output short circuit current test circuit for table VI
Table VII. Input clamp diode voltage test
Table VII. Input clamp diode voltage test (cont)
Figure 9. Input clamp diode voltage test circuit for table VII
Table VIII. Functional test
Figure 10. Functional test circuit for table VIII
Table IX. Static output voltage (low-level) test
Table X. Static output voltage (high-level) test
Figure 11. Static output voltage (low-level and high-level) test circuit for tables IX and X
Figure 12. KDC Logic load circuit
Table XI. Input current (high-level) test
Table XI. Input current (high-level) test (cont)
Figure 13. Input current (high-level) test circuit for table XI
Table XII. Input current (low-level) test
Table XIII. Power supply current test
Figure 14. Input current (low-level) test circuit for table XII
Figure 15. Power supply current test circuit for table XIII
Table XIV. Transition time and Propagation delay time test
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Table XIV. Transition time and Propagation delay time test (cont)
Figure 16. Transition time and Propagation delay time test circuit for table XIV
Figure 17. Transition time test circuit waveforms for table XIV
Figure 18. Propagation delay time (data and select to Y output) test circuit waveforms for table XIV
Figure 19. Propagation delay time (enable to Y output) test circuit waveforms for table XIV
Table XV. Output crosstalk (low-level and high-level) test
Table XV. Output crosstalk (low-level and high-level) test (cont)
Table XV. Output crosstalk (low-level and high-level) test (cont)
Figure 20. Output crosstalk (low-level and high-level) test circuit for table XV
Figure 21. Output crosstalk (low-level and high-level) test circuit waveforms for table XV
Figure 22. Power supply transient amplitude test circuit for table XVI
Figure 23. Power supply transient amplitude test circuit waveforms for table XVI
Table XVII. Power supply filter capacitance test
Table XVIII. Input capacitance test
Figure 24. Power supply filter capacitance and input capacitance test circuit for tables XVII and XVIII
Figure 25. Ground continuity test circuit for table XIX
Address
Standardization Document Improvement Proposal

Modules, Standard Electronic, Multiplexer, Digital, Key Code KDC

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