Modules, Standard Electronic, Buffer, Non-Inverting, Digital, Key Code AMC

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Modules, Standard Electronic, Buffer, Non-Inverting, Digital, Key Code AMC

Modules, Standard Electronic, Buffer, Non-Inverting, Digital, Key Code AMC
Module Configuration Requirements
Figure 1. AMC module function diagram, noninverting buffer
Table I. Module Electrical Requirements
Table I. Module Electrical Requirements (cont)
Qualification Testing
Module Handling Considerations
Dynamic Power Dissipation
Figure 2. Operating temperature and life test circuit
Figure 3. Component temperature test circuit
Figure 4. Vibration test circuit
Table II. Isolation test
Figure 5. Isolation test circuit for table II
Table III. Negative input clamp diode voltage test
Figure 6. Negative input clamp diode voltage test circuit for table III
Table IV. Static output voltage (low-level) test
Table V. Static output voltage (high-level) test
Figure 7. Static output voltage (low-level and high-level) test circuit for tables IV and V
Table VI. Logic level conversion test
Figure 8. Logic level conversion test circuit for table VI
Table VII. Static output voltage (low-level) test
Table VIII. Static output voltage (high-level) test
Figure 9. Static output voltage (low-level and high-level) test circuit for tables VII and VIII
Table IX. Input current (high-level) test
Table IX. Input current (high-level) test (cont)
Figure 10. Input current (high-level) test circuit for table IX
Table X. Input current (low-level) test
Figure 11. Input current (low-level) test circuit for table X
Table XI. Static power supply current (low-level and high-level) test
Figure 12. Static power supply current (low-level and high-level) test circuit for table XI
Table XII. Transition time (tTLH) test
Table XII. Transition time (tTLH) test (Cont)
Table XII. Transition time (tTLH) test (Cont)
Table XIII. Transition time (tTHL) test
Table XIII. Transition time (tTHL) test (Cont)
Table XIII. Transition time (tTHL) test (Cont)
Table XIV. Propagation delay time (tPLH) test
Table XIV. Propagation delay time (tPLH) test (cont)
Table XIV. Propagation delay time (tPLH) test (cont)
Table XV. Propagation delay time (tPHL) test
Table XV. Propagation delay time (tPHL) test (cont)
Table XV. Propagation delay time (tPHL) test (cont)
Figure 13. Transition time (tTLH and tTHL) and propagation dely time (tPLH and tPHL) test circuit
Figure 14. Transition time and propagation dely time test circuit waveforms
Figure 15. Logic load circuit
Table XVI. Output crosstalk (low-level) test
Table XVI. Output crosstalk (low-level) test (cont)
Table XVII. Output crosstalk (hig-level) test
Table XVII. Output crosstalk (hig-level) test (cont)
Figure 16. Output crosstalk (low-level and high-level) test circuit for tables XVI and XVII
Figure 17. Output crosstalk (low-level and high-level) test circuit waveforms for tables XVI and XVII
Table XVIII. Power supply transient amplitude test
Figure 18. Power supply transient amplitude test circuit for table XVIII
Figure 19. Power supply transient amplitude test circuit waveforms for table XVIII
Table XIX. Power supply filter capacitance test
Table XX. Input capacitance test
Figure 20. Power supply filter and input capacitance test circuit for tables XIX and XX
Standardization Document Improvement Proposal
Address

Modules, Standard Electronic, Buffer, Non-Inverting, Digital, Key Code AMC

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