Modules, Standard Electronic, Converter, A/D Module, Key Code JFJ

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Modules, Standard Electronic, Converter, A/D Module, Key Code JFJ

Modules, Standard Electronic, Converter, A/D Module, Key Code JFJ
Applicable Documents
Correleation Requirements
Table I. Module electrical requirements
Table I. Module electrical requirements (cont)
Table I. Module electrical requirements (cont)
Table I. Module electrical requirements (cont)
Circuit Pin Configurations
Figure 1. JFJ functional block diagram
Quality Assurance Diagram
Component Temperature Test
Figure 2. Operating temperature, component temperature, and end-of-life test circuit
Instruments Settings
Figure 3. Waveforms for instruments set-up
Figure 4. Vibration test circuit
Module Description
Input Parameters
Output Parameters
Functional Description of I/O Pins
Functional Description of I/O Pins (cont)
Functional Test Vectors
Table II. Isolation test
Isolation test tolerance table
Figure 5. Isolation test circuit for table II
Table III. Continuity test
Figure 6. Continuity test circuit for table III
Table IV. Power supply stress test
Figure 7. Power supply stress test circuit for table IV
Table V. Output short circuit current test
Procedure required to perform the test
Procedure required to perform the test (cont)
Figure 8. Output short circuit current test circuit for table V
Item J01 Settings
Table VI. Input current, high level, test
Procedure required to perform the test
Table VII. Input current, low level, test
Procedure required to perform the test
Figure 9. Input current test circuit for tables VI and VII
Table VIII. Output voltage, high level, test
Procedure required to perform the test
Table VIII. Output voltage, high level, test (cont)
Table IX. Output voltage, low level, test
Procedure required to perform the test
Table IX. Output voltage, low level, test (cont)
Figure 10. Output voltage test circuit for tables VIII and IX
Instrument Settings
Figure 11. Logic load circuit
Table X. Output leakage current, high level, test
Procedure required to perform the test
Table XI. Output leakage current, low level, test
Procedure required to perform the test
Figure 12. output leakage current, high and low level, test circuit for tables X and XI
Instrument Settings
Table XII. Power supply filter capacitance test
Figure 13. Power supply filter capacitance test circuit for table XII
Table XIII. Input capacitance test
Figure 14. Digital Input capacitance test circuit for table XIII
Table XIV. Power supply current test
Procedure required to perform the test
Figure 15. Power supply current test circuit for table XIV
Table XV. Unipolar accuracy test
Procedure required to perform the test
Table XVI. Bipolar accuracy test
Procedure required to perform the test
Table XVII. Linearity tests
Procedure required to perform the test
Table XVIII. Differential linearity test
Figure 16. Circuit for unipolar and bipolar accuracy and all codes linearity tests
Figure 16. Circuit for unipolar and bipolar accuracy and all codes linearity tests (cont)
Figure 17. Display circuit
Figure 18. Integral linearity test algorithm
Figure 19. Differential linearity test algorithms
Table XIX. 8-bit conversion test
Procedure required to perform the test
Figure 20. 8-bit conversion test circuit for table XIX
Figure 20. 8-bit conversion test circuit for table XIX (cont)
Table XX. Conversion cycle timing test
Table XXI. Read cycle timing tests
Procedure required to perform the test
Figure 21. Timing test circuit for tables XX and XXI
Figure 22. Timing diagram set-up for tables XX and XXI
Table XXII. Analog input impedance test
Table XXII. Analog input impedance test (cont)
Figure 23. Input impedance test circuit for table XXII
Table XXIII. Reference voltage, loaded, test
Figure 24. Reference voltage, loaded test circuit for table XXIII
Table XXIV. Power supply transient amplitude test
Procedure required to perform the test
Figure 25. Power supply transient amplitude test circuit for table XXIV
Figure 26. Timing circuit set-up for table XXIV
Figure 27. Power supply transient amplitude waveform for table XIV
Amendment Forms
Amendment Forms (cont)
Figure 5. VOUT (low-loaded) test circuit for table III
Figure 9. Functional compare and output voltage (high-level and low-level) test circuit for table VII
Standardization Document Improvement Proposal

Modules, Standard Electronic, Converter, A/D Module, Key Code JFJ

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