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Programming procedure for circuit B. |
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|  MIL-M-38510/203E
4.8 Programming procedure for circuit B. The programming characteristics in table IVB and the following
procedures shall be used for programming the device:
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5b and
the programming characteristics of table IVB shall apply to these procedures.
b. Raise VCC to 5.5 V.
c. Address the PROM with the binary address of the selected word to be programmed. Address inputs are
TTL compatible.
d. Disable the chip by applying VIH to CE2 and CE1 inputs. CE1 and CE2 inputs are TTL compatible.
e. Apply the VPP pulse to the programming pin ( CE1 ). In order to insure that the output transistor is off before
increasing the voltage on the output pin, the program pin's voltage pulse shall precede the output pin's
programming pulse by TD1 and leave after the output pins programming pulse by TD2 (see figure 5b).
f. Apply the VOUT pulse with duration of tP to the output selected for programming (see table IVB). The
outputs shall be programmed one output at a time, since internal decoding circuitry is capable of sinking
only one unit of programming current at a time. Note that the PROM is supplied with fuses generating a
high level logic output. Programming a fuse will cause the output to go to a low level logic in the verify
mode.
g. Other bits in the same word may be programmed sequentially by applying VOUT pulses to each output to
be programmed.
h. Repeat steps 4.8b through 4.8g for all other bits to be programmed.
i.
Enable the chip by applying VIL to the CE1 and CE2 and verify the program. Verification may check for a
low output by requiring the device to sink 12 mA at VCC = 4.0 V and 0.2 mA at VCC = 7.0 V at TC = +25C.
j.
If any bit does not verify as programmed it shall be considered a programming reject.
4.9 Programming procedures for circuit C. The programming characteristics in table IVC and the following
procedures shall be used for programming the device:
a. Connect the device in the electrical configuration for programming. The waveforms on the figure 5c and
the programming characteristics of table IVC shall apply to these procedures.
b. Terminate all device outputs with a 10 kΩ resistor to VCC.
c. Address the PROM with the binary address of the selected word to be programmed.
Raise VCC to VCCP = 8.75 0.25 V.
d. After a tD delay (10μs), apply VOUT = +17 1 V to the output to be programmed. Program one output at a
time.
e. After a tD delay (10μs), pulse CE1 and CE2 inputs to logic "0" for a duration of tP (1 to 2 ms).
f. After a tD delay (10μs), remove the VOUT pulse from the programmed output. Programming a fuse will
cause the output to go to a high-level logic in the verify mode.
g. Other bits in the same word may be programmed sequentially while the VCC input is at the VCCP level by
applying VOUT pulses to each output to be programmed allowing a delay of tD between pulses as shown on
figure 5c.
h. Repeat steps 4.9b through 4.9g for all other bits to be programmed.
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