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Programming procedure for circuit C. |
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|  MIL-M-38510/207E
4.9 Programming procedure for circuit C. The programming characteristics in table IVC and the following
procedures shall apply for programming the device:
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5C and the
programming characteristics in table IVC shall apply for programming to these procedures.
b. Terminate all device outputs with a 10 kΩ resistor to VCC.
c. Address the PROM with the binary address of the selected word to be programmed. Raise VCC to VCCP.
d. After a tD delay (10 μs), apply only one VOUT pulse to the output to be programmed.
Program one output at a time.
e. After a tD delay (10 μs), pulse CE input to logic "0" for a duration of tP.
f. After a tD delay (10 μs), remove the VOUT pulse from the programmed output. Note that the PROM is
supplied with fuses generating a low-level logic output. Programming a fuse will cause the output to go to a
high-level logic in the verify mode.
g. Other bits in the same word may be programmed sequentially while the VCC input is at the VCCP level by
applying VOUT pulses to each output to be programmed allowing a delay of tD between pulses as shown
on figure 5C.
h. Repeat 4.9b through 4.9g for all other bits to be programmed.
i. To verify programming after tD (10 μs) delay, lower VCC to VCCH and apply a logic "0" level to both CE
input. The programmed output should remain in the "1" state. Again lower VCC and VCCL and verify that
the programmed output remains in the "1" state.
j.
For class S and B devices, if any bit does not verify as programmed, it shall be considered a programming
reject.
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