Microcircuits, Digital, 4096-BIT Schottky, Bipolar, Programmable Read-only Memory (PROM), Monolithic Silicon

• Microcircuits, Digital, 4096-BIT Schottky, Bipolar, Programmable Read-only Memory (PROM), Monolithic Silicon
• Detail specification
• Table 1. Electrical performance characteristics
• Table 2. Electrical test requirements
• Unprogrammed PROM delivered to the user
• Qualification extension
• Quality conformance inspection
• Figure 1. Case outline x (24-lead, 3/8" x 3/8")
• Figure 1. Case outline x (24-lead, 3/8" x 3/8")-cont.
• Figure 2. Case outline Y (20-lead, 5/6" x 1.0")
• Figure 3. Terminal connections
• Figure 4. Truth table (unprogrammed)
• Figure 5. Logic diagrams
• Figure 5. Logic diagrams Logic circuit B (Device types 01, 02, 04, & 05)
• Figure 5. Logic diagrams Logic circuit C (Device types 01 and 02)
• Figure 5. Logic diagrams Logic circuit C (Device types 03)
• Figure 5. Logic diagrams Logic circuit D (Device types 01 and 02)
• Figure 5. Logic diagrams Logic circuit G (Device type 01)
• Figure 5. Logic diagrams Logic circuit G (Device type 02)
• Figure 5. Logic diagrams Logic circuit G (Device types 04 and 05)
• Figure 6. Burn-in and steady state life test circuit
• Figure 6. Burn-in and steady state life test circuit Device type 03
• Figure 6. Burn-in and steady state life test circuit Device types 04 and 05
• Figure 7. Switching time test circuit
• Figure 7. Switching time test circuit Device type 03
• Figure 7. Switching time test circuitDevice types 04 and 05
• Figure 8A. Programming voltage waveforms during programming for circuit A
• Figure 8B. Programming voltage waveforms during programming for circuit B
• Figure 8C. Programming voltage waveforms during programming for circuit C
• Figure 8E. Programming voltage waveforms during programming for circuit F
• Figure 8G. Programming voltage waveforms during programming for circuit G
• Figure 9. Freeze-out test bias configuration
• Figure 9. Freeze-out test bias configuration Device type 03
• Figure 9. Freeze-out test bias configuration Device types 04 and 05
• Table 3.Group A inspection for device type 01
• Table 3.Group A inspection for device type 01-cont.
• Table 3.Group A inspection for device type 02
• Table 3.Group A inspection for device type 02-cont.
• Table 3.Group A inspection for device type 03
• Table 3.Group A inspection for device type 03-cont.
• Table 3.Group A inspection for device type 04
• Table 3.Group A inspection for device type 04-cont.
• Table 3.Group A inspection for device type 05
• Table 3.Group A inspection for device type 05-cont.
• Table 3.Group A inspection for device type 05-cont.
• Table 3.Group A inspection for device type 05-cont.
• Table 4A. Programming characteristics for circuit A
• Programming procedure identification
• Table 4B. Programming characteristics for circuit B
• Programming procedures for circuit C
• Table 4C. Programming characteristics for circuit C
• Programming procedures for circuit D
• Table 4D. Programming characteristics for circuit D
• Programming procedures for circuit F
• Table 4E. Programming characteristics for circuit F
• Programming procedure for circuit G
• Table 4G. Programming characteristics for circuit G
• Ordering data
• Changes from previous issue
• Blank Page
• Instructions
• Standardization Document Improvement Proposal

Microcircuits, Digital, 4096-BIT Schottky, Bipolar, Programmable Read-only Memory (PROM), Monolithic Silicon

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