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Page Title:
Table 3. Group A inspection for device type 01-cont. |
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|  TABLE III. Group A inspection for device type 01 - Continued. 1/
MIL-
Cases
1
2
3
4
5
6
7
8
9
10
11
12
13
14
STD-
A,B,D
Test limits
Measured
Unit
Subgroup Symbol
883
terminal
Case C
9
12
13
14
2
1
3
4
5
6
7
8
10
11
Min
Max
method
Test no.
R1
Clock
Preset
VCC
Clear
NC
S1
S2
S3
GND
Q
R2
R3
Q
fMAX 5/ (Fig. 5)
70
D
IN
5.0 V
5.0 V
B
C
2.4 V
2.4 V
GND
OUT
2.4 V
2.4 V
Q
10
3
MHz
TC=+125C fMAX 5/
71
"
IN
5.0 V
"
B
"
"
"
OUT
"
"
"
Q
3
MHz
"
"
OUT
"
"
"
IN
"
J
ns
2.4 V
Clear/Q
125
"
"
tPLH
10
3003 *72 CKT A
"
"
OUT
"
"
"
IN
"
J
"
"
65
"
"
"
(Fig. 4) *72 CKT B
"
Clear/Q
"
OUT
"
"
"
"
J
"
IN
"
"
125
"
"
"
*73 CKT A
"
Preset/Q
"
"
"
"
"
"
J
"
IN
"
"
65
"
"
"
*73 CKT B
"
Preset/Q
"
"
"
"
"
"
IN
"
J
"
GND
250
"
"
"
74 CKT A
tPHL
Clear/Q
"
"
"
"
"
"
IN
"
J
"
"
100
"
"
"
74 CKT B
"
Clear/Q_
"
"
OUT
"
"
"
J
"
IN
"
"
250
"
"
"
75 CKT A
"
Preset/Q
"
"
"
"
"
J
"
IN
"
"
100
"
"
"
75 CKT B
"
"
Preset/Q
"
"
"
"
"
5.0 V
"
J
"
IN
125
"
"
"
76 CKT A
tPLH
"
Clock/Q
3003
"
"
"
"
"
5.0 V
"
J
"
"
65
"
"
"
(Fig. 5) 76 CKT B
Clock/Q
"
"
OUT
"
"
"
"
J
"
5.0 V
"
"
125
"
"
"
77 CKT A
Clock/Q
"
"
"
"
"
"
"
J
"
5.0 V
"
"
65
"
"
"
77 CKT B
Clock/Q
"
"
"
"
"
"
"
5.0 V
"
J
"
"
200
"
"
"
78 CKT A
Clock/Q
tPHL
"
"
"
"
"
"
5.0 V
"
J
"
"
85
"
"
"
78 CKT B
Clock/Q
"
"
"
OUT
"
"
"
J
"
5.0 V
"
"
200
"
"
"
79 CKT A
"
Clock/Q
"
"
OUT
"
"
"
J
"
5.0 V
"
"
85
"
"
"
79 CKT B
"
Clock/Q
"
Same tests, terminal conditions, and limits as for subgroup 10, except TC= -55C.
11
NOTE:
A = normal clock pulse, B = momentary GND, then 4.5 V.
C = input connected to Q , D = input connected to Q.
J = input pulse tp ≥ 100 ns, PRR = 0.5 MHz, VOL = 0 V, VOH = 4.5 V.
Terminal conditions (pins not designated may be H ≥ 2.0 V, or L ≤ 0.8 V, or open).
1/
2/
Tests shall be performed in sequence.
3/
Input voltages shown are: A = 2.4 V minimum and B = 0.4 V maximum.
4/
Output voltages shall be either: (a) H = 2.4 V, minimum and L 0.4 V, maximum when using a high speed checker double comparator; or (b)
H ≥ 1.5 V and L ≤ 1.5 V when using a high speed checker single comparator.
5/
fMAX, minimum limit specified is the frequency of the input pulse. The output frequency shall be one-half of the input frequency.
*
These tests are performed at device manufacturer's option.
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