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Abbreviations, symbols, and definitions. |
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|  MIL-M-38510/231C
h.
Requirements for special carriers, lead lengths, or lead forming, if applicable. These requirements shall
not affect the part number. Unless otherwise specified, these requirements will not apply to direct
purchase by or direct shipment to the Government.
i.
Requirements for "JAN" marking.
j.
Packaging Requirements (see 5.1)
6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which
are, at the time of award of contract, qualified for inclusion in Qualified Manufacturers List QML-38535 whether or not
such products have actually been so listed by that date. The attention of the contractors is called to these
requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal
Government tested for qualification in order that they may be eligible to be awarded contracts or purchase orders for
the products covered by this specification. Information pertaining to qualification of products may be obtained from
DSCC-VQ, 3990 E. Broad Street, Columbus, Ohio 43218-3990.
6.4 Superseding information. The requirements of MIL-M-38510 have been superseded to take advantage of the
available Qualified Manufacturer Listing (QML) system provided by MIL-PRF-38535. Previous references to MIL-M-
38510 in this document have been replaced by appropriate references to MIL-PRF-38535. All technical requirements
now consist of this specification and MIL-PRF-38535. The MIL-M-38510 specification sheet number and PIN have
been retained to avoid adversely impacting existing government logistics systems and contractor's parts lists.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined
in MIL-PRF-38535, MIL-HDBK-1331, and as follows:
GND ............................................
Electrical ground (common terminal)
IOHZ ..............................................
High impedance (off state) output high current
IOLZ ..............................................
High impedance (off state) output low current
VIC ................................................
Input clamp voltage
VIN ................................................
Voltage level at an input terminal
tAVQV .............................................
Address access time
tSLQV .............................................
Chip select time
tWLWH ............................................
Write pulse width
tSCQV .............................................
Chip select output disable time
tWHAC ............................................
Address hold time after write
tDCWL.............................................
Data setup time prior to write
tWHSC ............................................
Chip select hold time after write
tWHQV ............................................
Write recovery time
tWLQV.............................................
Write setup time
tAVWL .............................................
Address setup time prior to write
tSVWL .............................................
Chip select setup time prior to write
tWHOC ............................................
Data hold time after write
tSCQZ .............................................
Chip select disable time to high impedance
tWLQZ.............................................
Write enable time to high impedance
tELQV .............................................
Output select time
tEHQZ .............................................
Output select disable time to high Z
tEHQV .............................................
Output select disable time
61
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