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Page Title:
Figure 5. Timing test conditions over operating temperature range. |
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|  MIL-M-38510/245B
Device types
Timing
01
02
Unit
parameter
Description
Min
Max
Min
Max
tELQV
Chip enable access time
120
120
ns
ns
tAVQV
Address access time
120
120
ns
tELQX
Chip enable output enable time
5
5
ns
tWLQZ
Write enable output disable time
50
ns
tEHQZ
Chip enable output disable time
50
50
ns
tELEH
Chip enable pulse negative width
120
120
ns
tEHEL
Chip enable pulse positive width
50
50
ns
tAVEL
Address setup time
0
0
ns
tELAX
Address hold time
40
40
ns
tWLWH
Write enable pulse negative width
20
120
ns
tWLEH
Write enable pulse setup time to chip disable
70
120
ns
tWLEL
Write enable pulse setup time to chip enable
0
0
ns
tELWH
Write enable pulse hold time from chip enable
40
120
ns
tELDX
Write data hold time
25
ns
tDVWH
Data setup time
50
ns
tWHDX
Data hold time
0
ns
tELEL
Read or write cycle time
170
170
ns
tDVEL
Write data setup time
0
ns
tWHEH
Write enable high to chip enable high
10
ns
tQVWL
Data valid to write time
0
ns
tEHWH
Output high-Z time
0
ns
tDVWL
Data setup time
0
ns
tWLDX
Data hold time
25
ns
tWLDV
Write data delay time
70
ns
tWHEL
Write enable read mode setup time
0
FIGURE 5. Timing test conditions over operating temperature range.
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