Microcircuits, Digital, CMOS, 512 x 9 BIT, First In - First Out Dual Port Memory (FIFO), Monolithic Silicon

• Microcircuits, Digital, CMOS, 512 x 9 BIT, First In - First Out Dual Port Memory (FIFO), Monolithic Silicon
• Terminal connections and pin assignments
• Table 1. Electrical performance characteristics
• Table 1. Electrical performance characteristics-cont.
• Table 1. Electrical performance characteristics-cont.
• Sampling and inspection
• Figure 1. Terminal connections and pin assignments
• Figure 1. Terminal connections and pin assignments Device types 01, 02, 03
• Figure 2. Functional block diagram
• Figure 3. Switching time load circuit, test conditions and waveforms
• Figure 3. Switching time load circuit, test conditions and waveforms Reset Cycle Timing
• Figure 3. Switching time load circuit, test conditions and waveforms Asynchronous Read Write Cycle Timing
• Figure 3. Switching time load circuit, test conditions and waveforms Full Flag Cycle Timing
• Figure 3. Switching time load circuit, test conditions and waveforms Empty Flag Cycle Timing
• Figure 3. Switching time load circuit, test conditions and waveforms Retransmit Cycle Timing
• Figure 4. Burn-in and life test circuit and timing waveforms
• Figure 4. Burn-in and life test circuit and timing waveforms Reset and Write
• Table 3. Group A Inspection for device types 01, 02, 03
• Table 3. Group A Inspection for device types 01, 02, 03-cont.
• Ordering data
• Logistic support
• Figure 5. Input and output signals
• Substitutability
• Appendix. Functional Algorithms
• Multichip mode
• Blank Page
• Instructions
• Standardization Document Improvement Proposal

Microcircuits, Digital, CMOS, 512 x 9 BIT, First In - First Out Dual Port Memory (FIFO), Monolithic Silicon

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