1. Clock input pulse has the following characteristics:
Vgen = 3 0.2 V, t1 ≤ 2.5 ns and PRR ≤ 1 MHz.
2. D input has the following characteristics:
Vgen = 3 0.2 V, tsetup = 3 ns minimum, thold = 1 ns minimum,
E to CP = tsetup (Dn > CLK); Dn to CP = thold (Dn > CLK).
For fMAX testing, see table III.
tPLH and tPHL are shown for Qn only, (CLK > Qn, Q n). The Qn output will have
these reversed and are omitted for clarity.
Switching time waveforms Continued.