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Burn-in and life test circuits. |
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|  MIL-M-38510/758B
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as
modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form,
fit, or function as described herein.
4.1.1 Burn-in and life test circuits. Burn-in and life test circuits shall be constructed so that the devices are stressed at the
maximum operating conditions stated in 4.2c or 4.2d, as applicable, or equivalent as approved by the qualifying activity.
4.2 Screening. Screening shall be in accordance with MIL-PRF-38535 and shall be conducted on all devices prior to
qualification and conformance inspection. The following additional criteria shall apply:
a. The burn-in test duration, test condition, and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained
under document control by the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015 of MIL-STD-883.
b. Delete the sequence specified as interim (pre-burn-in) electrical parameters through interim (post-burn-in) electrical
parameters of table IA of MIL-PRF-38535 and substitute lines 1 through 7 of table II herein.
c. Unless otherwise specified in the manufacturer's QM plan for static burn-in, test condition A, method 1015 of
MIL-STD-883, the test duration for each static test shall be 24 hours minimum for class S devices and in accordance
with table I of method 1015 for class B devices.
(1) For static burn-in I, all inputs shall be connected to GND. Outputs may be open or connected to
VCC/2 0.5 V. Resistors R1 are optional on both inputs and open outputs, and required on outputs
connected to VCC/2 0.5 V. R1 = 220Ω to 47 kΩ.
(2) For static burn-in II, all inputs shall be connected through the R1 resistors to VCC. Outputs may be open or
connected to VCC/2 0.5 V. Resistors are optional on open outputs, and required on outputs connected to
VCC/2 0.5 V. R1 = 220Ω to 47 kΩ.
(3) VCC = 5.5 V +0.5 V, -0.00 V.
d. Unless otherwise specified in the manufacturer's QM plan for dynamic burn-in, test condition D, method 1015 of
MIL-STD-883, the following shall apply:
(1) Input resistors = 220Ω to 2 kΩ 20 percent.
(2) Output resistors = 220Ω 20 percent.
(3) VCC = 5.5 V +0.5 V, -0.00 V.
(4) All control inputs shall be connected through a resistor in parallel to VCC or GND, as applicable, enabling
the function of the control input. Each output shall be connected through a resistor to VCC/2 0.5 V. For
device type 02, input A0 shall be connected through a resistor to a clock pulse (CP0); input A1 shall be
connected through a resistor to a clock pulse (CP1); and input A2 shall be connected through a resistor to
a clock pulse (CP2). For device type 03, inputs A0A and A0B shall each be connected through a resistor
to a common clock pulse (CP0); and inputs A1A and A1B shall each be connected through a resistor to a
common clock pulse (CP1).
(5) CP0, CP1, and CP2 = 25 kHz to 1 MHz square waves; fCP1 = fCP0/2; fCP2 = fCP0/4; duty cycle = 50 percent
15 percent; VIH = 4.5 V to VCC; VIL = 0 V 0.5 V; tr, tf ≤ 100 ns.
e. Interim and final electrical test parameters shall be as specified in table II.
f. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements
may, at the manufacturer's option, be performed separately or included in the final electrical parameter requirements.
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