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|  MIL-M-82376B
3.3.1.7.3 Overall functional block diagrams. Overall functional block
diagrams (figure 9) shall be provided to display the operational sequence and
signal flow of the entire training device. Major functions of the equipment
shall be correlated in a logical manner to show inputs, outputs, power
distribution, etc. Hardware packaging shall be subordinated to the functional
arrangement. Blocks on the diagram shall include references to the
appropriate functional schematic diagrams continuing the detailed circuitry.
3.3.1.7.3.1 Intermediate level block diagrams. When the complexity of the
training device dictates, intermediate block diagrams shall be provided for
each system or subsystem.
3.3.1.7.4 Functional schematic diagrams. Overall and intermediate
functional schematic diagrams for each system and each subsystem, as required
to support fault isolation to the level defined in the maintenance concept,
shall be provided, and shall be coordinated with the block diagrams specified
in 3.3.1.7.3 and 3.3.1.7.3.1. Mnemonics, flag notes, reference designations,
and pin identification data shall be included to facilitate signal tracing.
Only that circuitry of an assembly/chassis that relates to the function being
shown need be depicted. All inputs and outputs shall be labeled and shall be
cross-referenced to origin or destination. COTS equipment and GFE shall be
treated as "black boxes" with all inputs/outputs and interface data depicted.
Test points shall be identified and data required for fault isolation such as
waveforms and voltage levels shall be presented adjacent to the appropriate
test points. Figure 10 is an example of a functional schematic diagram.
3.3.1.7.5 Unit or chassis schematic. A schematic of each individual
chassis, printed circuit board or fundamental unit, regardless of the
maintenance concept, shall be provided (see figure 11). Circuit components
shall be grouped into functional elements; e.g. , amplifiers, gates, buffers,
flip-flops, etc. The location of the functional elements and functional
element groups on the page shall cause the direction of the signal flow to be
obvious and, when practical, from left to right while feedback signal flow
shall be from right to left. Voltage levels and waveforms necessary to assist
in rapid and complete fault isolation shall be provided.
3.3.1.7.5.1 Waveform analysis. Where waveform analysis is necessary to
determine normal or abnormal operation, graphic reproductions of normal
waveforms shall be provided on the functional and unit schematic diagrams to
support the text. Critical parameters, such as signal amplitude, pulse width,
durations, slope, repetition rates, and polarities, shall be shown.
3.3.1.7.5.2 Timing circuit diagrams. For circuitry requiring
synchronization, timing circuit diagrams shall be provided depicting all
significant timing relationships and the origins of all timing signals analog
or digital (figure 12).
3.3.1.7.6 Detailed logic diagrams. Where digital circuitry is involved,
detailed logic diagrams depicting all logic functions shall be supplied (see
figure 13).
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