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|  MIL-N-85005A(AS)
*3.5.4.4.3.1.1.1 Input Data - The data shall consist of a serial
train of a variable number of words, each containing 16 bits transmitted
LSB first. The bit rate shall be 1 MHz. A spacing of 2 to 5 sec shall
exist between words. A spacing of at least 60 milliseconds shall exist
between the end of a data train and the beginning of the next data
train.
These data shall describe the following symbol types and be sent in
the following order:
(1)
Command Words (3 words)
(2)
Scale Factor Symbol (4 words)
(3)
Priority Fly To Symbol (2 words)
(4)
Aircraft Symbol (4 words)
(5)
Fly to Symbol (2 words)
(6)
Marker Symbols (2 words each)
Data shall be organized in word pairs, such that symbol identifica-
tion is established by bits 1 - 6 from word pairs, and x and y position
data are established by bits 7 through 16 from word pairs. All position
data are natural binary with LSB first. Word formats shall conform to
Figures 11 through 17.
*3.5.4.4.3.1.1.2
Input Data Clock - A signal data input clock
shall be provided consisting of sets of pulses with 16 pulses per set.
Clock sets shall be separated by a 2 to 5 sec pause. The clock rate
shall be 1 MHz and shall be synchronous with the data. (See Figure 18.)
3.5.4.4.3.1.1.3
Input Data Enable - A discrete signal shall be
provided which precedes the first clock pulse by 5 2 sec and remains
until 5 2 sec after the last clock pulse.
1 MHz Clock - A continuous 1.0 MHz clock shall
3.5.4.4.3.1.1.4
be provided. See Figure 18 for waveform definition. Computer Malfunc-
tion shall be indicated by a continuous logic "1" instead of the 1.0 MHz
clock. When the continous logic "1" is received the malfunciton "X"
symbol will be displayed on the CRT.
3.5.4.4.3.1.1.5
Output Data Enable - An Output Data Enable
discrete shall be provided to request that the Output Words (2) be
transmitted from the Control to the NC. The discrete signal shall
precede the first clock pulse by 5 2 sec and remains until 5 2 s
after the last clock pulse.
Output Data Clock - A signal Output Data Clock
3.5.4.4.3.1.1.6
shall be received from the NC to facilitate transmission of the Output
This clock signal shall consist of 2 sets of 1 MHz pulses,
each set containing 16 pulses with 2 to 5 microseconds between sets.
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