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|  MIL-N-85005A(AS)
3.5.4.4.3.2.3 Video - The video signal shall provide automatic
control to maintain uniform brightness of the symbols being presented on
the CRT.
(1) Levels:
The output video level shall be
between + 1.0 volt to 2.5 volts.
(2) Impedance:
The video signal shall be capable of
driving 90 ohms and 100 pf thru a
maximum cable length of 12 feet.
3.5.4.4.3.2.4 Serial Digital Output - The following channel shall
be established to transmit data from the Control to the Navigation
Computer. The output data signals shall use high noise immunity balanced
line circuits.
3.5.4.4.3.2.4.1
Output Data - The data shall consist of a
serial train of two words, each containing 16 bits. The bit rate shall
be 1 MHz. A spacing of 2 to 5 sec shall exist between words.
The word format shall be as shown in Figure 19,
3.5.4.4.4
Built-In-Test (BIT) - The unit shall provide for two
levels of test.
3.5.4.4.4.1
Hardware BIT - Circuits within the Control shall
provide continuous monitoring as follows:
(1)
Detection of failure to receive any logical
"1's" on the Input Data Word line for a period
of 0.5 to 3.0 seconds.
(2)
Detection of failure to receive Input Data
Clock for a period exceeding 0.5 to 3.0 seconds.
Detection of failure to receive Input Data
(3)
Ready for a period of 0.5 to 3.0 seconds.
(4)
1 MHz clock, ref. Para. 3.5.4.4.3.1.1.4.
Detection of any one of the above abnormalities shall result in
display of the Malfunction Symbol. (Ref 3.5.4.4.2.1.5.)
3.5.4.4.4.2
Software BIT - Subsystem loop test capability shall
be provided by a discrete output to the Computer operated by the Test
switch.
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