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Page Title: Figure 2. Truth tables and timing diagrams Device type 05
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img
MIL-M-38510/306E
Device type 05
INPUTS
OUTPUTS
CLEAR
CLOCK
A
B
QA
QB ....
QH
L
X
X
X
L
L
L
H
L
X
X
QA0
QB0
QH0
H
H
H
H
QAn
QGn
H
L
X
L
QAn
QGn
H
X
L
L
QAn
QGn
H = high level (steady state), L = low level (steady state)
X = irrelevant (any input, including transitions)
= transition from low to high level
QA0, QB0, QH0 = the level of QA, QB, or QH, respectively, before the indicated
steady state input conditions were established.
QAn, QGn = the level of QA, or QG before the most recent  transition of the
clock; indicates a one-bit shift.
FIGURE 2. Truth tables and timing diagrams - Continued.
19

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