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Instruction Status Interrupt Word Format |
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|  MIL-D-81347C(AS)
Detailed Functional Description
3.5.4.4.4.4
The following paragraphs contain a detailed functional description
tion of the characteristics and performance requirements of the DAMS.
Word Formats
3.5.4.4.4.4.1
Operational Instruction Word Formats
3.5.4.4.4.4.1.1
Figure 164 shows the word formats for the normal operational
instructions for reading, writing, status request, master clear, and terminate. In the cases of read
and write instructions, each instruction shall be sent from the computer in a two-word sequence. The
first word shall contain the begin address and the second word shall contain the end address of a data
block to be written or read. All instruction words sent from the computer shall be sent under E F
control.
Memory Protect and Test Instruction Word Formats
3.5.4.4.4.4.1.2
.
Figure 165 shows the word format for the Memory Protect
instruction and indicates that any or all of the unused codes may be used for test mode operations. All
instructions in these categories shall be sent from the computer under EF control.
Instruction Status Interrupt Word Format
3.5.4.4.4.4.1.3
Figure 166 shows the format of the Instruction Status Interrupt
word. This word shall be sent to the computer with the status results of all instructions except the
status request and test instructions. The contents of the word are described below:
Bit 29 (Normal Completion) shall be used only following a
(1)
read or write instruction. It shall be set to a Logic 1 to indicate that the instruction was completed
with no data errors or fault conditions detected during the execution of the instruction. Status condi-
tions which shall cause the Normal completion bit to remain reset are Drum Failure, Parity Error,
Sync Detect Error or Invalid Function.
(2)
Bit 28 (Parity Error) shall become a Logic 1 when a parity
error is detected during a read or write instruction.
(3)
Bit 27 (Sync Detect Error) shall become a logic 1 when the
preamble word is not detected at the first addressed location of a read instruction or at the proper
positions within the data block during a read operation. It shall be an indication that the preamble word
was not properly written, on the drum, the preamble word was improperly read or that the data to be
read was improperly addressed. A preamble word is located at the first addressed word location.
(4) Bit 26 (Drum Failure) shall be used in conjunction with
bits 4 through 10 and shall become a Logic 1 whenever a drum malfunction is detected.
(5) Bit 25 (Cleared) shall be a Logic 1 when the Drum Con-
troller is in an idle (inactive) state and all status registers have been cleared.
(6) Bit 24 (Standby) shall be a Logic 1 when the Drum Con-
troller is in an idle (inactive) state and any status data accumulated during the previously executed
instruction remains in the status register.
(7) Bit 23 (Invalid Function) shall be used in conjunction with
Bits O through 3. It shall become a Logic 1 to indicate an error relating to the instruction word contents.
(8) Bits 22 through 11 (Memory Protect Status) shall indicate
the state of the memory protect register flip-flops, denoting the status of the Memory Protect switches
and/or the Computer Memory Protect Word.
(9) Bit 10 (Clock Loss) shall be a Logic 1 when any one or
combination of the Word Clock, Tachometer Clock or Byte Clock is not received by the Drum Con-
troller from the Magnetic Drum Memory.
277
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