 |
|||
|
Page Title:
Diagnostic Test Mode Description |
|
||
| ||||||||||
|
|  MIL-D-81347C (AS)
(2) Off Line Mode shall be used to permit the operator to
perform all the instructions executed by the DAMS. The operational read and write instructions shall
be executed in the following three modes; single instructions, repeat instruction execution without
regard to error, and repeat instruction execution with halt on error. No communication shall take
place with the Computer in Off Line Mode.
Automatic testing by means of computer instructions shall be
provided in order that all areas of the Drum Controller and Magnetic Drum Memory are tested to
the extent necessary in order that the fault detection and isolation requirements of this specification
are met.
3.5.4.4.4.4.11.1
Diagnostic Test Mode Description
The diagnostics shall consist of 14 test modes for DAMS testing.
The test mode codes and associated test loops are shown in the memory protect and test instruction
word format. (See Figure 165. )
A description and sequence of operation for each of the test
modes follows:
(1) TM-1 All Zeroes to Computer - This test mode shall enable
a known condition of the 30 data input bits to be sent to th e computer.
The test instruction shall be sent via the EFR/EF transfer
sequence. The DAMMS shall set all computer input bits to a logic zero via the data input multiplexer
and raise the EI. The input data transfer shall be accomplished by the EI/IA sequence.
(2) TM-2 All Ones to Computer - This test mode shall be
similar to TM-1 except all input bits shall be set to a logic 1.
(3) TM-3 Computer Data to Computer - This test mode shall
enable verification of the computer output data paths to the error count registers and the status input
data paths from the error count registers.
In response to a TM-3 instruction code, the DAMS shall generate
an ODR. The computer shall output a 30-bit data word which shall be loaded into the error count
registers. The data shall be sent to the computer via the IDR/IA sequence.
(4) TM-4 Buffer A and B Load, Circulate and Unload - This
test mode shall check the data paths from the computer to the buffers through the buffers, from the
buffers to the computer.
Upon receipt of a TM-4 instruction code via an EFR/EF data
transfer, the DAMS shall raise the ODR. The computer shall output 64 words, loading buffers A and
B. When the loading is complete, the 64 words shall be sent to the computer via the IDR/IA data
transfer. At the same time the data shall also be multiplexed and recirculated back into the buffers.
The contents of buffers A and B shall be again unloaded to the computer by the IDR/IA transfer sequence.
.
(5) TM-5 Parity and Error Counters - During TM-5, the
parity generators shall be disabled and the error counters shall be incremented to verify proper
operation.
Test mode entry shall be via the EFR/EF data transfer. Output
bit 21 shall exercise
the byte or buffer priority logic and output bit 20 shall determine which parity bit
generator is disabled.
With output bit 20 a logic O, byte 1 parity shall be disabled and with output bit
20 a logic 1, byte 2
parity shall be disabled. Upon receipt of the test code, the DAMS shall generate
an ODR which shall
initiate a 64-word ODR/OA data transfer sequence. The bit contents of the
computer data words
shall determine correct or incorrect parity of the words loaded into buffers A
and B.
285
|
|
Privacy Statement - Press Release - Copyright Information. - Contact Us |
Click
here for thousands of PDF manuals