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|  MIL-W-85057 (AS)
(4) Division: Dividing a double word length dividend
(positive or negative) by a single word divisor
(positive or negative) to yield a single word true
quotient.
3.5.1.4.3 Logical Operations.
The following minimum logical operations
shall be executed:
(1) Logical OR: Perform a bit-by-bit logical OR of a single
word length operand and the accumulator register to produce
a logical sum in the accumulator register.
(2) Logical AND: Perform a bit-by-bit logical AND of a
single word length operand and the accumulator register
to produce a logical product in the accumulator register.
(3) Exclusive OR: Perform a bit-by-bit exclusive OR of a
single word length operand and the accumulator register
to produce a logical sum in the accumulator register.
3.5.1.4.4 Shift Operations.
The DC shall execute the following shift
operations:
Logical left shift: Shall shift the register contents
(1)
of the accumulator left (least significant bit (LSB)
toward the most significant bit (MSB) by N bits where
N Is an integer between O and 15. Zeros shall be
entered into vacated low order bit positions. Bits
shifted out of high order bit positions shall be discarded.
(2)
Arithmetic right shift: Shall shift the register content
of the accumulator right by N bits with the sign bit being
extended N places to the right. Bits shifted out of low
order bit positions shall be discarded.
Logical left shift double: Shall shift the register
(3)
contents of the accumulator and the quotient register
to the left by N bits with bits shifted out of the
high order bit positions of the quotient register
being shifted into the low order bit positions of the
accumulator register. Zeros shall be entered into the
vacated low order bit positions of the quotient register.
(4)
Arithmetic right shift double: Shall shift the register
contents of the accumulator and quotient right by N bits
with bits shifted out of the low order bit positions of
the accumulator register being shifted into the high
order bit positions of the quotient register and the
sign bit of the accumulator register extended N places
to the right. Bits shifted out of the low order bit
positions of the quotient register shall be discarded.
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